diff options
| author | Tom Rini <[email protected]> | 2022-09-06 08:59:51 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-09-06 08:59:51 -0400 |
| commit | 166d2693dd3447ffa18112611c85ee4bb37ffa4b (patch) | |
| tree | efa16cc06a6aa6f6b67cca5e635014b008aac60a /arch/arm | |
| parent | 51601397fcbb13e6dc2e4223408230c82955a601 (diff) | |
| parent | 44366be10a9386a8887124a77a7d06169c3aa1f3 (diff) | |
Merge tag 'fsl-qoriq-2022-9-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Reset fixes for p1_p2_rdb_pc
Fix use after free issue fix in fsl_enetc.c
Fix for fsl ddr: make bank_addr_bits reflect actual bits
sl28 board update
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/spl.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 5f09ef0a4af..3a4b665f244 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -67,11 +67,24 @@ void spl_board_init(void) #endif } +void tzpc_init(void) +{ + /* + * Mark the whole OCRAM as non-secure, otherwise DMA devices cannot + * access it. This is for example necessary for MMC boot. + */ +#ifdef TZPCR0SIZE_BASE + out_le32(TZPCR0SIZE_BASE, 0); +#endif +} + void board_init_f(ulong dummy) { int ret; icache_enable(); + tzpc_init(); + /* Clear global data */ memset((void *)gd, 0, sizeof(gd_t)); if (IS_ENABLED(CONFIG_DEBUG_UART)) |