diff options
| author | Angelo Dureghello <[email protected]> | 2023-02-25 23:25:26 +0100 |
|---|---|---|
| committer | Angelo Dureghello <[email protected]> | 2023-03-15 01:41:57 +0100 |
| commit | 7ff7b46e6ce44b2ee09647a928ce1021c3c8a66e (patch) | |
| tree | ae549d05e63968da500aaed843f1f13aa635c5e5 /arch/m68k/include | |
| parent | 12f5489297bc3b58bd9cc870da4331775263398c (diff) | |
m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
This is not a Kconfig option so changing to _CFG.
Signed-off-by: Angelo Durgehello <[email protected]>
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/immap.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 8207c8d5b73..74516cc6219 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -16,7 +16,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -38,7 +38,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -63,7 +63,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -86,7 +86,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -105,7 +105,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -130,7 +130,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_TMR0) #define CFG_SYS_TMR_BASE (MMAP_TMR3) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) @@ -152,7 +152,7 @@ #define CFG_SYS_NUM_IRQS (192) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -174,7 +174,7 @@ #define CFG_SYS_NUM_IRQS (128) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -196,7 +196,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ @@ -217,7 +217,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -239,7 +239,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -269,7 +269,7 @@ #define MMAP_DSPI MMAP_DSPI0 /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) |