Merge branch 'master' into next

11 files changed, 88 insertions, 31 deletions

diff --git a/arch/m68k/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c
index 331288e0060..b02ea29f635 100644
--- a/arch/m68k/cpu/mcf523x/interrupts.c
+++ b/arch/m68k/cpu/mcf523x/interrupts.c
@@ -22,7 +22,7 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c
index e8a1e132d27..e787c7605f8 100644
--- a/arch/m68k/cpu/mcf52x2/interrupts.c
+++ b/arch/m68k/cpu/mcf52x2/interrupts.c
@@ -34,7 +34,7 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE);
@@ -42,7 +42,7 @@ void dtimer_intr_setup(void)
 	clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
 	setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI);
 }
-#endif				/* CONFIG_MCFTMR */
+#endif				/* CFG_MCFTMR */
 #endif				/* CONFIG_M5272 */
 
 #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
@@ -63,7 +63,7 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
@@ -72,7 +72,7 @@ void dtimer_intr_setup(void)
 	clrbits_be32(&intp->imrl0, 0x00000001);
 	clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK);
 }
-#endif				/* CONFIG_MCFTMR */
+#endif				/* CFG_MCFTMR */
 #endif				/* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
 
 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
@@ -83,11 +83,11 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
 	mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI);
 }
-#endif				/* CONFIG_MCFTMR */
+#endif				/* CFG_MCFTMR */
 #endif				/* CONFIG_M5249 || CONFIG_M5253 */
diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S
index dbe2b54e410..cef8d79aad1 100644
--- a/arch/m68k/cpu/mcf530x/start.S
+++ b/arch/m68k/cpu/mcf530x/start.S
@@ -132,7 +132,8 @@ _start:
 	 * then (and always) gd struct space will be reserved
 	 */
 	move.l	%sp, -(%sp)
-	bsr	board_init_f_alloc_reserve
+	move.l	#board_init_f_alloc_reserve, %a1
+	jsr	(%a1)
 
 	/* update stack and frame-pointers */
 	move.l	%d0, %sp
@@ -140,14 +141,17 @@ _start:
 
 	/* initialize reserved area */
 	move.l	%d0, -(%sp)
-	bsr	board_init_f_init_reserve
+	move.l	#board_init_f_init_reserve, %a1
+	jsr	(%a1)
 
 	/* run low-level CPU init code (from flash) */
-	bsr	cpu_init_f
+	move.l	#cpu_init_f, %a1
+	jsr	(%a1)
 
 	/* run low-level board init code (from flash) */
 	clr.l	%sp@-
-	bsr	board_init_f
+	move.l	#board_init_f, %a1
+	jsr	(%a1)
 
 	/* board_init_f() does not return */
 
@@ -239,7 +243,8 @@ _fault:
 _exc_handler:
 	SAVE_ALL
 	movel	%sp,%sp@-
-	bsr	exc_handler
+	move.l	#exc_handler, %a1
+	jsr	(%a1)
 	addql	#4,%sp
 	RESTORE_ALL
 
@@ -247,7 +252,8 @@ _exc_handler:
 _int_handler:
 	SAVE_ALL
 	movel	%sp,%sp@-
-	bsr	int_handler
+	move.l	#int_handler, %a1
+	jsr	(%a1)
 	addql	#4,%sp
 	RESTORE_ALL
 
diff --git a/arch/m68k/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c
index 64e04664a52..bbe823c0cf7 100644
--- a/arch/m68k/cpu/mcf532x/interrupts.c
+++ b/arch/m68k/cpu/mcf532x/interrupts.c
@@ -23,7 +23,7 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c
index ea0cf87990c..fb80a879c7e 100644
--- a/arch/m68k/cpu/mcf5445x/interrupts.c
+++ b/arch/m68k/cpu/mcf5445x/interrupts.c
@@ -26,7 +26,7 @@ int interrupt_init(void)
 	return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
 	int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/dts/stmark2.dts b/arch/m68k/dts/stmark2.dts
index 56c328ff0cb..ebe8580a0aa 100644
--- a/arch/m68k/dts/stmark2.dts
+++ b/arch/m68k/dts/stmark2.dts
@@ -27,7 +27,7 @@
 	flash: is25lp128@1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "spi-flash";
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <60000000>;
 		reg = <1>;
 	};
diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h
index 273e843c4ae..5f576ba16f9 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -23,6 +23,9 @@ struct arch_global_data {
 #ifdef CONFIG_MCF5441x
 	unsigned long sdhc_clk;
 #endif
+#if defined(CONFIG_FSL_ESDHC)
+	u32 sdhc_per_clk;
+#endif
 };
 
 #include <asm-generic/global_data.h>
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h
index 8207c8d5b73..74516cc6219 100644
--- a/arch/m68k/include/asm/immap.h
+++ b/arch/m68k/include/asm/immap.h
@@ -16,7 +16,7 @@
 #define CFG_SYS_UART_BASE		(MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -38,7 +38,7 @@
 #define CFG_SYS_UART_BASE		(MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -63,7 +63,7 @@
 #define CFG_SYS_NUM_IRQS		(64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(mbar_readLong(MCFSIM_IPR))
@@ -86,7 +86,7 @@
 #define CFG_SYS_NUM_IRQS		(64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(mbar_readLong(MCFSIM_IPR))
@@ -105,7 +105,7 @@
 #define CFG_SYS_UART_BASE		(MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -130,7 +130,7 @@
 #define CFG_SYS_NUM_IRQS		(64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_TMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_TMR3)
 #define CFG_SYS_TMRPND_REG		(((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr)
@@ -152,7 +152,7 @@
 #define CFG_SYS_NUM_IRQS		(192)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -174,7 +174,7 @@
 #define CFG_SYS_NUM_IRQS		(128)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -196,7 +196,7 @@
 #define CFG_SYS_NUM_IRQS             (64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE          (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE             (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(((volatile intctrl_t *) \
@@ -217,7 +217,7 @@
 #define CFG_SYS_UART_BASE		(MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -239,7 +239,7 @@
 #define CFG_SYS_UART_BASE		(MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG		(((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -269,7 +269,7 @@
 #define MMAP_DSPI			MMAP_DSPI0
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE		(MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG	(((int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index b66d66afd29..6e1fd938f52 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -5,7 +5,7 @@
 
 ## Build a couple of necessary functions into a private libgcc
 ## if the user asked for it
-lib-$(CONFIG_USE_PRIVATE_LIBGCC) += lshrdi3.o muldi3.o ashldi3.o
+lib-$(CONFIG_USE_PRIVATE_LIBGCC) += lshrdi3.o muldi3.o ashldi3.o ashrdi3.o
 
 obj-y	+= bdinfo.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
diff --git a/arch/m68k/lib/ashrdi3.c b/arch/m68k/lib/ashrdi3.c
new file mode 100644
index 00000000000..e144378b7f5
--- /dev/null
+++ b/arch/m68k/lib/ashrdi3.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is:
+ * Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+ */
+
+#define BITS_PER_UNIT 8
+
+typedef		 int SItype	__attribute__((mode(SI)));
+typedef unsigned int USItype	__attribute__((mode(SI)));
+typedef		 int DItype	__attribute__((mode(DI)));
+typedef int word_type           __attribute__((mode(__word__)));
+
+struct DIstruct {
+	SItype high, low;
+};
+
+typedef union {
+	struct DIstruct s;
+	DItype ll;
+} di_union;
+
+DItype __ashrdi3(DItype u, word_type b)
+{
+	di_union w;
+	word_type bm;
+	di_union uu;
+
+	if (b == 0)
+		return u;
+
+	uu.ll = u;
+
+	bm = (sizeof(SItype) * BITS_PER_UNIT) - b;
+	if (bm <= 0) {
+		/* w.s.high = 1..1 or 0..0 */
+		w.s.high = uu.s.high >> (sizeof(SItype) * BITS_PER_UNIT - 1);
+		w.s.low = uu.s.high >> -bm;
+	} else {
+		USItype carries = (USItype)uu.s.high << bm;
+
+		w.s.high = uu.s.high >> b;
+		w.s.low = ((USItype)uu.s.low >> b) | carries;
+	}
+
+	return w.ll;
+}
+
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index 2ce69088d94..ca8c0396235 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -25,7 +25,7 @@ static volatile ulong timestamp = 0;
 #define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
 #endif
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 #ifndef CFG_SYS_UDELAY_BASE
 #	error	"uDelay base not defined!"
 #endif
@@ -111,7 +111,7 @@ ulong get_timer(ulong base)
 	return (timestamp - base);
 }
 
-#endif				/* CONFIG_MCFTMR */
+#endif				/* CFG_MCFTMR */
 
 /*
  * This function is derived from PowerPC code (read timebase as long long).