Merge tag 'xilinx-for-v2023.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.07-rc1

cmd:
- Print results in hex instead of dec in smc command

firmware:
- Cover missing ZYNQMP_FIRMWARE dependencies

fpga:
- fix loads for unencrypted use case

relocation
- Add support for BE systems

spi:
- Fix xilinx_spi init reset sequence

arasan nand:
- Remove hardcoded bbt option
- Set ofnode value

xilinx:
- Enable SMC command
- Fix some sparse issues

zynqmp:
- Remove cdns,zynq-gem compatible string
- Add optee node
- Some DT cleanups

zynq:
- Some DT cleanups

microblaze
- Remove MANUAL_RELOC option

4 files changed, 2 insertions, 46 deletions

diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index ce157a79ccc..e38c9f6d711 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -4,19 +4,8 @@ menu "MicroBlaze architecture"
 config SYS_ARCH
 	default "microblaze"
 
-config NEEDS_MANUAL_RELOC
-	bool "Disable position-independent pre-relocation code"
-	default y
-	help
-	  U-Boot expects to be linked to a specific hard-coded address, and to
-	  be loaded to and run from that address. This option lifts that
-	  restriction, thus allowing the code to be loaded to and executed from
-	  almost any 4K aligned address. This logic relies on the relocation
-	  information that is embedded in the binary to support U-Boot
-	  relocating itself to the top-of-RAM later during execution.
-
 config STATIC_RELA
-	def_bool y if !NEEDS_MANUAL_RELOC
+	def_bool y
 
 choice
 	prompt "Target select"
diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk
index 467c5ca1b12..64c3f313195 100644
--- a/arch/microblaze/config.mk
+++ b/arch/microblaze/config.mk
@@ -13,10 +13,6 @@ LDFLAGS_FINAL += --gc-sections
 
 ifeq ($(CONFIG_SPL_BUILD),)
 PLATFORM_CPPFLAGS += -fPIC
-endif
-
-ifeq ($(CONFIG_STATIC_RELA),y)
-PLATFORM_CPPFLAGS += -fPIC
 LDFLAGS_u-boot += -pic
 endif
 
diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile
index 1c586a7de02..b8c1dcbe14f 100644
--- a/arch/microblaze/cpu/Makefile
+++ b/arch/microblaze/cpu/Makefile
@@ -5,7 +5,6 @@
 
 extra-y	= start.o
 obj-y	= irq.o
-obj-y	+= interrupts.o cache.o exception.o cpuinfo.o
-obj-$(CONFIG_STATIC_RELA)	+= relocate.o
+obj-y	+= interrupts.o cache.o exception.o cpuinfo.o relocate.o
 obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o
 obj-$(CONFIG_SPL_BUILD)	+= spl.o
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 7079d9e1704..c1e0fcda0a4 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -10,16 +10,11 @@
 #include <asm-offsets.h>
 #include <config.h>
 
-#if defined(CONFIG_STATIC_RELA)
 #define SYM_ADDR(reg, reg_add, symbol)	\
 	mfs	r20, rpc; \
 	addik	r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \
 	lwi	reg, r20, symbol@GOT; \
 	addk	reg, reg reg_add;
-#else
-#define SYM_ADDR(reg, reg_add, symbol)	\
-	addi	reg, reg_add, symbol
-#endif
 
 	.text
 	.global _start
@@ -35,7 +30,6 @@ _start:
 	addi	r1, r0, CONFIG_SPL_STACK
 #else
 	add	r1, r0, r20
-#if defined(CONFIG_STATIC_RELA)
 	bri	1f
 
 	/* Force alignment for easier ASM code below */
@@ -68,7 +62,6 @@ uboot_sym_start:
 	brlid	r15, mb_fix_rela
 	nop
 #endif
-#endif
 
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 
@@ -310,7 +303,6 @@ relocate_code:
 	brlid	r15, __setup_exceptions
 	nop
 
-#if defined(CONFIG_STATIC_RELA)
 	/* reloc_offset is current location */
 	SYM_ADDR(r10, r0, _start)
 
@@ -331,27 +323,7 @@ relocate_code:
 	add	r9, r9, r5
 	brlid	r15, mb_fix_rela
 	nop
-
 	/* end of code which does relocation */
-#else
-	/* Check if GOT exist */
-	addik	r21, r23, _got_start
-	addik	r22, r23, _got_end
-	cmpu	r12, r21, r22
-	beqi	r12, 2f /* No GOT table - jump over */
-
-	/* Skip last 3 entries plus 1 because of loop boundary below */
-	addik	r22, r22, -0x10
-
-        /* Relocate the GOT. */
-3:	lw	r12, r21, r0 /* Load entry */
-	addk	r12, r12, r23 /* Add reloc offset */
-	sw	r12, r21, r0 /* Save entry back */
-
-	cmpu	r12, r21, r22 /* Check if this cross boundary */
-	bneid	r12, 3b
-	addik	r21. r21, 4
-#endif
 
 	/* Flush caches to ensure consistency */
 	brlid	r15, flush_cache_all