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authorWeijie Gao <[email protected]>2022-05-20 11:21:51 +0800
committerDaniel Schwierzeck <[email protected]>2022-07-13 23:03:37 +0200
commit2948d9cf8637e49e2a172b8936a9f5a3a04bca13 (patch)
tree97fbd9e601648c5cb162a9545e7c29fd99e73d61 /arch/mips/include
parent9a3bbb0eba51cc6abd11354a52fdff709756a7c2 (diff)
mips: add support for noncached_alloc()
This patch adds support for noncached_alloc() which was only supported by ARM platform. Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG is provided to access uncached memory. So most code of this patch is copied from cache.c of ARM platform, with only two differences: 1. MMU is untouched in noncached_set_region() 2. Address returned by noncached_alloc() is converted using KSEG1ADDR() Reviewed-by: Daniel Schwierzeck <[email protected]> Signed-off-by: Weijie Gao <[email protected]>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/system.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index 79e638844b2..89a2ac209fc 100644
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -282,4 +282,24 @@ static inline void instruction_hazard_barrier(void)
: "=&r"(tmp));
}
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+/* 1MB granularity */
+#define MMU_SECTION_SHIFT 20
+#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT)
+
+/**
+ * noncached_init() - Initialize non-cached memory region
+ *
+ * Initialize non-cached memory area. This memory region will be typically
+ * located right below the malloc() area and be accessed from KSEG1.
+ *
+ * It is called during the generic post-relocation init sequence.
+ *
+ * Return: 0 if OK
+ */
+int noncached_init(void);
+
+phys_addr_t noncached_alloc(size_t size, size_t align);
+#endif /* CONFIG_SYS_NONCACHED_MEMORY */
+
#endif /* _ASM_SYSTEM_H */