common: Convert *.c/h from UTF-8 to ASCII enconfing

Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Marek Behún <[email protected]>

4 files changed, 6 insertions, 6 deletions

diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index 3ba33d27c17..58c89d5e645 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -225,7 +225,7 @@
 #define VC3_MPAR_FAW VC3_MPAR_tFAW
 #define VC3_MPAR_BL 4
 #define MSCC_MEMPARM_MR0 ((VC3_MPAR_RL - 4) << 4) | ((VC3_MPAR_tWR - 4) << 9)
-/* ODT_RTT: “0x0040” for 120ohm, and “0x0004” for 60ohm. */
+/* ODT_RTT: "0x0040" for 120ohm, and "0x0004" for 60ohm. */
 #define MSCC_MEMPARM_MR1 0x0040
 #define MSCC_MEMPARM_MR2 ((VC3_MPAR_WL - 5) << 3)
 #define MSCC_MEMPARM_MR3 0
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
index ff32dab67b5..25e2877469a 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
@@ -267,7 +267,7 @@ void cvmx_helper_pki_set_fcs_op(int node, int interface, int nports, int has_fcs
  *				    buffer separate from the work queue entry. Words following the
  *				    WQE in the same cache line will be zeroed, other lines in the
  *				    buffer will not be modified and will retain stale data (from the
- *				    buffer’s previous use). This setting may decrease the peak PKI
+ *				    buffer's previous use). This setting may decrease the peak PKI
  *				    performance by up to half on small packets.
  */
 void cvmx_helper_pki_set_wqe_mode(int node, bool pkt_outside_wqe);
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-pki.h
index c1feb55a1f0..d918f792eee 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-pki.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-pki.h
@@ -110,8 +110,8 @@ enum cvmx_pki_wqe_vlan { CVMX_PKI_USE_FIRST_VLAN = 0, CVMX_PKI_USE_SECOND_VLAN }
  * Controls how the PKI statistics counters are handled
  * The PKI_STAT*_X registers can be indexed either by port kind (pkind), or
  * final style. (Does not apply to the PKI_STAT_INB* registers.)
- *    0 = X represents the packet’s pkind
- *    1 = X represents the low 6-bits of packet’s final style
+ *    0 = X represents the packet's pkind
+ *    1 = X represents the low 6-bits of packet's final style
  */
 enum cvmx_pki_stats_mode { CVMX_PKI_STAT_MODE_PKIND, CVMX_PKI_STAT_MODE_STYLE };
 
@@ -880,7 +880,7 @@ int cvmx_pki_get_pkind_style(int node, int pkind);
  *    buffer separate from the work queue entry. Words following the
  *    WQE in the same cache line will be zeroed, other lines in the
  *    buffer will not be modified and will retain stale data (from the
- *    buffer’s previous use). This setting may decrease the peak PKI
+ *    buffer's previous use). This setting may decrease the peak PKI
  *    performance by up to half on small packets.
  */
 void cvmx_pki_set_wqe_mode(int node, u64 style, bool pkt_outside_wqe);
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
index 86f89be855f..bda607203f3 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
@@ -366,7 +366,7 @@ enum cvmx_pko_memalg_e {
 			       */
 	MEMALG_SETRSLT = 2,   /* [DSZ] = B64; mem = PKO_MEM_RESULT_S.  */
 	MEMALG_ADD = 8,	      /* mem = mem + PKO_SEND_MEM_S[OFFSET] */
-	MEMALG_SUB = 9,	      /* mem = mem – PKO_SEND_MEM_S[OFFSET] */
+	MEMALG_SUB = 9,	      /* mem = mem - PKO_SEND_MEM_S[OFFSET] */
 	MEMALG_ADDLEN = 0xA,  /* mem += [OFFSET] + PKO_SEND_HDR_S[TOTAL] */
 	MEMALG_SUBLEN = 0xB,  /* mem -= [OFFSET] + PKO_SEND_HDR_S[TOTAL] */
 	MEMALG_ADDMBUF = 0xC, /* mem += [OFFSET] + mbufs_freed */