diff options
| author | Emil Medve <[email protected]> | 2010-08-31 22:57:38 -0500 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2011-04-27 22:29:04 -0500 |
| commit | df8af0b4a63b6375e7abbaffe1f93cc01c34529c (patch) | |
| tree | 19742bd55b4069b843ecef9fd97570065cee2a30 /arch/powerpc/include | |
| parent | 3d28c5c8ed84c47314fcc447c86964e7c898a1d5 (diff) | |
p4080/serdes: Implement the XAUI workaround for SERDES9 erratum
Signed-off-by: Emil Medve <[email protected]>
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 1 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_serdes.h | 3 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 41fd86c4e22..88bc0309c05 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -304,6 +304,7 @@ #define CONFIG_SYS_FSL_ERRATUM_ESDHC136 #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 +#define CONFIG_SYS_P4080_ERRATUM_SERDES9 /* P5010 is single core version of P5020 */ #elif defined(CONFIG_PPC_P5010) diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index 9d9f2e4cce1..0f31af1db32 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -55,6 +55,9 @@ void fsl_serdes_init(void); #ifdef CONFIG_FSL_CORENET int serdes_get_first_lane(enum srds_prtcl device); +#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 +void serdes_reset_rx(enum srds_prtcl device); +#endif #endif #endif /* __FSL_SERDES_H */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index d6ac61afaf5..286ecb9a5ca 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2137,6 +2137,8 @@ typedef struct serdes_corenet { #define SRDS_TECR0_TEQ_TYPE_2LVL 0x10000000 u32 res3; u32 ttlcr0; /* Transition Tracking Loop Ctrl 0 */ +#define SRDS_TTLCR0_FLT_SEL_MASK 0x3f000000 +#define SRDS_TTLCR0_PM_DIS 0x00004000 u32 res4[7]; } lane[24]; u32 res6[384]; |
