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authorYao Zi <[email protected]>2025-06-06 04:28:02 +0000
committerLeo Yu-Chi Liang <[email protected]>2025-07-03 16:14:13 +0800
commitf28911368eaf1b403e85ac0346fadee3fa21b6c4 (patch)
tree398277b032d84a0f609a84aba1d5f1427cb29371 /arch/riscv/include
parent5afad3d4a314464af34f9c312d3028b9053f1135 (diff)
riscv: cpu: th1520: Add a routine to bring up secondary cores
On coldboot, only HART 0 among the four HARTs of TH1520 is brought up by hardware, and the remaining HARTs are in reset states, requiring manual setup of reset address and deassertion to function normal. Introduce a routine to do the work. Signed-off-by: Yao Zi <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'arch/riscv/include')
-rw-r--r--arch/riscv/include/asm/arch-th1520/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-th1520/cpu.h b/arch/riscv/include/asm/arch-th1520/cpu.h
index 837f0b8d06b..e164e9ab979 100644
--- a/arch/riscv/include/asm/arch-th1520/cpu.h
+++ b/arch/riscv/include/asm/arch-th1520/cpu.h
@@ -5,5 +5,6 @@
#ifndef _ASM_TH1520_CPU_H_
#define _ASM_TH1520_CPU_H_
+void th1520_kick_secondary_cores(void);
void th1520_invalidate_pmp(void);
#endif /* _ASM_TH1520_CPU_H_ */