diff options
| author | Yao Zi <[email protected]> | 2025-05-13 09:04:54 +0000 |
|---|---|---|
| committer | Leo Yu-Chi Liang <[email protected]> | 2025-05-21 16:49:52 +0800 |
| commit | 3dbff9eecc869bc28ce010cf97d2cfee25c44f3a (patch) | |
| tree | 9439bba2cf554b27e6a6a50f974f6f7fdda105f4 /arch/riscv/lib/Makefile | |
| parent | bbf5f79bba07703c85ab9e3f4101758afb402c09 (diff) | |
riscv: lib: Split out support for T-Head cache management operations
Designed before a standard set of cache management operations defined in
RISC-V, earlier T-Head cores like C906 and C910 provide CMO through the
customized extension XTheadCMO, which has been used in the CV1800B port
of U-Boot.
This patch splits XTheadCMO-related code into a generic module, allowing
SoCs shipping T-Head cores to share the code.
Link: https://github.com/XUANTIE-RV/thead-extension-spec
Signed-off-by: Yao Zi <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'arch/riscv/lib/Makefile')
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 189b35c24d3..db8d235c699 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-$(CONFIG_SIFIVE_CACHE) += sifive_cache.o +obj-$(CONFIG_SYS_CACHE_THEAD_CMO) += thead_cmo.o ifeq ($(CONFIG_$(PHASE_)RISCV_MMODE),y) obj-$(CONFIG_$(PHASE_)RISCV_ACLINT) += aclint_ipi.o obj-$(CONFIG_ANDES_PLICSW) += andes_plicsw.o |