diff options
| author | Simon Glass <[email protected]> | 2025-03-15 14:25:41 +0000 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-04-03 11:41:55 -0600 |
| commit | 5ee60f3afa146e45752e1e99c382f18dd7f8200e (patch) | |
| tree | e19d067080f60e21a105e6a9dc6290cd39e4fa83 /arch/x86/include | |
| parent | b4a3ebe30426712a1981eb3bf53992d88bae01e3 (diff) | |
x86: Support CPU functions in long mode
At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass <[email protected]>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/cpu.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index fd389d4024c..1f1b545ea50 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -58,6 +58,10 @@ enum { X86_SYSCON_PUNIT, /* Power unit */ }; +#define CPUID_FEATURE_PAE BIT(6) +#define CPUID_FEATURE_PSE36 BIT(17) +#define CPUID_FEAURE_HTT BIT(28) + struct cpuid_result { uint32_t eax; uint32_t ebx; @@ -161,12 +165,16 @@ static inline unsigned int cpuid_edx(unsigned int op) return edx; } -#if !CONFIG_IS_ENABLED(X86_64) - +#if CONFIG_IS_ENABLED(X86_64) +static inline int flag_is_changeable_p(u32 flag) +{ + return 1; +} +#else /* Standard macro to see if a specific flag is changeable */ -static inline int flag_is_changeable_p(uint32_t flag) +static inline int flag_is_changeable_p(u32 flag) { - uint32_t f1, f2; + u32 f1, f2; asm( "pushfl\n\t" @@ -181,9 +189,9 @@ static inline int flag_is_changeable_p(uint32_t flag) "popfl\n\t" : "=&r" (f1), "=&r" (f2) : "ir" (flag)); - return ((f1^f2) & flag) != 0; + return ((f1 ^ f2) & flag) != 0; } -#endif +#endif /* X86_64 */ /** * cpu_enable_paging_pae() - Enable PAE-paging |