arm64: versal: Add mini eMMC configuration

This patch adds mini eMMC configuration which has only
emmc0 and emmc1 functionalities and can run from small
amount of memory. This is required for memory constraint
devices.

Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

3 files changed, 131 insertions, 0 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ca506234808..c61c0c62002 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -186,6 +186,9 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
 	zynqmp-zc1751-xm017-dc3.dtb		\
 	zynqmp-zc1751-xm018-dc4.dtb		\
 	zynqmp-zc1751-xm019-dc5.dtb
+dtb-$(CONFIG_ARCH_VERSAL) += \
+	versal-mini-emmc0.dtb \
+	versal-mini-emmc1.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
 	zynqmp-r5.dtb
 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts
new file mode 100644
index 00000000000..7f57d232b7f
--- /dev/null
+++ b/arch/arm/dts/versal-mini-emmc0.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal Mini eMMC0 Configuration
+ *
+ * (C) Copyright 2018-2019, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <[email protected]>
+ * Michal Simek <[email protected]>
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "xlnx,versal";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "Xilinx Versal MINI eMMC0";
+
+	clk25: clk25 {
+		compatible = "fixed-clock";
+		#clock-cells = <0x0>;
+		clock-frequency = <25000000>;
+	};
+
+	dcc: dcc {
+		compatible = "arm,dcc";
+		status = "okay";
+		u-boot,dm-pre-reloc;
+	};
+
+	amba: amba {
+		u-boot,dm-pre-reloc;
+		compatible = "simple-bus";
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+
+		sdhci0: sdhci@f1040000 {
+			compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
+			status = "okay";
+			reg = <0x0 0xf1040000 0x0 0x10000>;
+			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clk25 &clk25>;
+			xlnx,device_id = <0>;
+			no-1-8-v;
+			xlnx,mio_bank = <0>;
+			#stream-id-cells = <1>;
+		};
+	};
+
+	aliases {
+		serial0 = &dcc;
+		mmc0 = &sdhci0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x20000000>;
+	};
+};
diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts
new file mode 100644
index 00000000000..9ecb1ce5dce
--- /dev/null
+++ b/arch/arm/dts/versal-mini-emmc1.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal Mini eMMC1 Configuration
+ *
+ * (C) Copyright 2018-2019, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <[email protected]>
+ * Michal Simek <[email protected]>
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "xlnx,versal";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "Xilinx Versal MINI eMMC1";
+
+	clk25: clk25 {
+		compatible = "fixed-clock";
+		#clock-cells = <0x0>;
+		clock-frequency = <25000000>;
+	};
+
+	dcc: dcc {
+		compatible = "arm,dcc";
+		status = "okay";
+		u-boot,dm-pre-reloc;
+	};
+
+	amba: amba {
+		u-boot,dm-pre-reloc;
+		compatible = "simple-bus";
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+
+		sdhci1: sdhci@f105000 {
+			compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
+			status = "okay";
+			reg = <0x0 0xf1050000 0x0 0x10000>;
+			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clk25 &clk25>;
+			xlnx,device_id = <1>;
+			no-1-8-v;
+			xlnx,mio_bank = <0>;
+			#stream-id-cells = <1>;
+		};
+	};
+
+	aliases {
+		serial0 = &dcc;
+		mmc0 = &sdhci1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x20000000>;
+	};
+};