diff options
| author | Tom Rini <[email protected]> | 2022-10-06 08:44:23 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-10-06 08:44:23 -0400 |
| commit | 2afa989fbecf25ea23902a9c480f179ba608785a (patch) | |
| tree | 4d7dfaa06c49a01b573eb32ad48d780b546efc50 /arch | |
| parent | 2d4591353452638132d711551fec3495b7644731 (diff) | |
| parent | 3bb0458fa0ef127718ed1c47c33279f9ef03238d (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Kirkwood: remove km/keymile kirkwood boards (Holger)
- mtd: nand: pxa3xx: simplify ECC hardware parameters (Chris)
- tools: kwbimage: Verify maximal kwbimage header size (Pali)
- mvebu: Add support for programming LD eFuse on Armada 385 (Pali)
- mvebu: Misc timer improvements / cleanup (Stefan)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/kirkwood-km_common.dtsi | 48 | ||||
| -rw-r--r-- | arch/arm/dts/kirkwood-km_kirkwood.dts | 53 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 15 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/Makefile | 5 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/efuse.c | 83 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/efuse.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/spl.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/timer.c | 41 |
9 files changed, 100 insertions, 152 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 71e9bd4da33..9374b3cdabf 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -58,7 +58,6 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \ kirkwood-ib62x0.dtb \ kirkwood-iconnect.dtb \ kirkwood-is2.dtb \ - kirkwood-km_kirkwood.dtb \ kirkwood-lsxhl.dtb \ kirkwood-lschlv2.dtb \ kirkwood-net2big.dtb \ diff --git a/arch/arm/dts/kirkwood-km_common.dtsi b/arch/arm/dts/kirkwood-km_common.dtsi deleted file mode 100644 index 9d0fc51c2d7..00000000000 --- a/arch/arm/dts/kirkwood-km_common.dtsi +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/ { - chosen { - bootargs = "console=ttyS0,115200n8 earlyprintk"; - stdout-path = &uart0; - }; - - ocp@f1000000 { - pinctrl: pin-controller@10000 { - pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >; - pinctrl-names = "default"; - - pmx_i2c_gpio_sda: pmx-gpio-sda { - marvell,pins = "mpp8"; - marvell,function = "gpio"; - }; - pmx_i2c_gpio_scl: pmx-gpio-scl { - marvell,pins = "mpp9"; - marvell,function = "gpio"; - }; - }; - - serial@12000 { - status = "okay"; - clock-frequency = <200000000>; - }; - }; - - i2c { - compatible = "i2c-gpio"; - gpios = < &gpio0 8 GPIO_ACTIVE_HIGH /* sda */ - &gpio0 9 GPIO_ACTIVE_HIGH>; /* scl */ - i2c-gpio,delay-us = <2>; /* ~100 kHz */ - }; -}; - -&nand { - status = "okay"; - chip-delay = <25>; -}; - -&pciec { - status = "okay"; -}; - -&pcie0 { - status = "okay"; -}; diff --git a/arch/arm/dts/kirkwood-km_kirkwood.dts b/arch/arm/dts/kirkwood-km_kirkwood.dts deleted file mode 100644 index b2c0209f5db..00000000000 --- a/arch/arm/dts/kirkwood-km_kirkwood.dts +++ /dev/null @@ -1,53 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/dts-v1/; - -#include "kirkwood.dtsi" -#include "kirkwood-98dx4122.dtsi" -#include "kirkwood-km_common.dtsi" - -/ { - model = "Keymile Kirkwood Reference Design"; - compatible = "keymile,km_kirkwood", "marvell,kirkwood-98DX4122", "marvell,kirkwood"; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; - }; - - aliases { - spi0 = &spi0; - }; -}; - -&mdio { - status = "okay"; - - ethphy0: ethernet-phy@0 { - reg = <0>; - }; -}; - -ð0 { - status = "okay"; - ethernet0-port@0 { - phy-handle = <ðphy0>; - }; -}; - -&spi0 { - status = "okay"; - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80", "jedec,spi-nor", "spi-flash"; - reg = <0>; - spi-max-frequency = <33000000>; - mode = <3>; - - partition@uboot { - reg = <0x000000 0x0c0000>; - label = "uboot"; - }; - }; -}; diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 2ebe341ed1b..fe6b785d0bd 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -348,6 +348,21 @@ config MVEBU_EFUSE_FAKE from a memory block. This is can be used for testing prog scripts. +config MVEBU_EFUSE_VHV_GPIO + string "VHV_Enable GPIO name for eFuse programming" + depends on MVEBU_EFUSE && !ARMADA_3700 + help + The eFuse programing (burning) phase requires supplying 1.8V to the + device on the VHV power pin, while for normal operation the VHV power + rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power + document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details. + . + This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power. + +config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW + bool "VHV_Enable GPIO is Active Low" + depends on MVEBU_EFUSE_VHV_GPIO != "" + config SECURED_MODE_IMAGE bool "Build image for trusted boot" default false diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 103e64cf204..406a9ee8f68 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -16,10 +16,6 @@ obj-y = dram.o obj-y += gpio.o obj-y += mbus.o -ifndef CONFIG_TIMER -obj-y += timer.o -endif - else # CONFIG_ARCH_KIRKWOOD obj-y = cpu.o @@ -97,7 +93,6 @@ $(obj)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \ endif # CONFIG_SPL_BUILD obj-y += gpio.o obj-y += mbus.o -obj-y += timer.o obj-$(CONFIG_SPL_BUILD) += spl.o obj-$(CONFIG_SPL_BUILD) += lowlevel_spl.o diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c index 80318c339eb..be5dc0e07d9 100644 --- a/arch/arm/mach-mvebu/efuse.c +++ b/arch/arm/mach-mvebu/efuse.c @@ -10,6 +10,7 @@ #include <asm/arch/cpu.h> #include <asm/arch/efuse.h> #include <asm/arch/soc.h> +#include <asm/gpio.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/mbus.h> @@ -56,17 +57,48 @@ static struct mvebu_hd_efuse *get_efuse_line(int nr) return efuses + nr; } -static void enable_efuse_program(void) +#ifndef DRY_RUN +static int vhv_gpio; +#endif + +static int enable_efuse_program(void) { #ifndef DRY_RUN + if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) { + if (gpio_lookup_name(CONFIG_MVEBU_EFUSE_VHV_GPIO, NULL, NULL, &vhv_gpio)) { + printf("Error: VHV gpio lookup failed\n"); + return -EOPNOTSUPP; + } + if (gpio_request(vhv_gpio, CONFIG_MVEBU_EFUSE_VHV_GPIO)) { + printf("Error: VHV gpio request failed\n"); + return -EOPNOTSUPP; + } + if (gpio_direction_output(vhv_gpio, + IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 0 : 1)) { + printf("Error: VHV gpio enable failed\n"); + return -EINVAL; + } + mdelay(5); /* Wait for the VHV power to stabilize */ + } + setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE); #endif + + return 0; } static void disable_efuse_program(void) { #ifndef DRY_RUN clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE); + + if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) { + if (gpio_direction_output(vhv_gpio, + IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 1 : 0)) + printf("Error: VHV gpio disable failed\n"); + gpio_free(vhv_gpio); + vhv_gpio = 0; + } #endif } @@ -123,7 +155,9 @@ static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1) if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1)) return 0; - enable_efuse_program(); + res = enable_efuse_program(); + if (res) + return res; res = do_prog_efuse(efuse, new_val, mask0, mask1); @@ -132,6 +166,48 @@ static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1) return res; } +int mvebu_prog_ld_efuse(int ld1, u32 word, u32 val) +{ + int i, res; + u32 line[EFUSE_LD_WORDS]; + + res = mvebu_efuse_init_hw(); + if (res) + return res; + + mvebu_read_ld_efuse(ld1, line); + + /* check if lock bit is already programmed */ + if (line[EFUSE_LD_WORDS - 1]) + return -EPERM; + + /* check if word is valid */ + if (word >= EFUSE_LD_WORDS) + return -EINVAL; + + /* check if there is some bit for programming */ + if (val == (line[word] & val)) + return 0; + + res = enable_efuse_program(); + if (res) + return res; + + mvebu_read_ld_efuse(ld1, line); + line[word] |= val; + + for (i = 0; i < EFUSE_LD_WORDS; i++) { + writel(line[i], ld_efuses + i); + mdelay(1); + } + + mdelay(5); + + disable_efuse_program(); + + return 0; +} + int mvebu_efuse_init_hw(void) { int ret; @@ -254,6 +330,9 @@ int fuse_prog(u32 bank, u32 word, u32 val) { int res = 0; + if (bank == EFUSE_LD0_LINE || bank == EFUSE_LD1_LINE) + return mvebu_prog_ld_efuse(bank == EFUSE_LD1_LINE, word, val); + /* * NOTE: Fuse line should be written as whole. * So how can we do that with this API? diff --git a/arch/arm/mach-mvebu/include/mach/efuse.h b/arch/arm/mach-mvebu/include/mach/efuse.h index 122e735f2fc..b125c30beb8 100644 --- a/arch/arm/mach-mvebu/include/mach/efuse.h +++ b/arch/arm/mach-mvebu/include/mach/efuse.h @@ -70,4 +70,8 @@ int mvebu_write_efuse(int nr, struct efuse_val *val); int mvebu_lock_efuse(int nr); +void mvebu_read_ld_efuse(int ld1, u32 *line); + +int mvebu_prog_ld_efuse(int ld1, u32 word, u32 val); + #endif diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index ca2d5a59d77..424599286e5 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -340,8 +340,6 @@ void board_init_f(ulong dummy) preloader_console_init(); - timer_init(); - /* Armada 375 does not support SerDes and DDR3 init yet */ #if !defined(CONFIG_ARMADA_375) /* First init the serdes PHY's */ diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c deleted file mode 100644 index 557a378776d..00000000000 --- a/arch/arm/mach-mvebu/timer.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) Marvell International Ltd. and its affiliates - * Written-by: Prafulla Wadaskar <[email protected]> - * - * Copyright (C) 2015 Stefan Roese <[email protected]> - */ - -#include <common.h> -#include <init.h> -#include <asm/io.h> -#include <asm/arch/soc.h> -#include <linux/bitops.h> - -#define TIMER_LOAD_VAL 0xffffffff - -static int init_done __section(".data") = 0; - -/* - * Timer initialization - */ -int timer_init(void) -{ - /* Only init the timer once */ - if (init_done) - return 0; - init_done = 1; - - /* load value into timer */ - writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10); - writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14); - -#if defined(CONFIG_ARCH_MVEBU) - /* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */ - setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11)); -#endif - /* enable timer in auto reload mode */ - setbits_le32(MVEBU_TIMER_BASE + 0x00, 0x3); - - return 0; -} |
