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authorBeniamino Galvani <[email protected]>2018-06-14 13:43:40 +0200
committerTom Rini <[email protected]>2018-06-19 07:31:47 -0400
commit2e668af5531815dc6a6190cf6490b866da71ffaa (patch)
tree19f0f2494c4484d7476472ead10d9e4a1d820c26 /arch
parentc0fc1e215c6117b159bb9ca736d3e3338bbc028b (diff)
meson: use the clock driver
Use the clk framework to initialize clocks from drivers that need them instead of having hardcoded frequencies and initializations from board code. Signed-off-by: Beniamino Galvani <[email protected]> Signed-off-by: Neil Armstrong <[email protected]>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-meson/gx.h10
-rw-r--r--arch/arm/mach-meson/eth.c3
2 files changed, 1 insertions, 12 deletions
diff --git a/arch/arm/include/asm/arch-meson/gx.h b/arch/arm/include/asm/arch-meson/gx.h
index 03fb6b03de8..4bc9475d35e 100644
--- a/arch/arm/include/asm/arch-meson/gx.h
+++ b/arch/arm/include/asm/arch-meson/gx.h
@@ -56,14 +56,4 @@
/* Ethernet memory power domain */
#define GX_MEM_PD_REG_0_ETH_MASK (BIT(2) | BIT(3))
-/* Clock gates */
-#define GX_GCLK_MPEG_0 GX_HIU_ADDR(0x50)
-#define GX_GCLK_MPEG_1 GX_HIU_ADDR(0x51)
-#define GX_GCLK_MPEG_2 GX_HIU_ADDR(0x52)
-#define GX_GCLK_MPEG_OTHER GX_HIU_ADDR(0x53)
-#define GX_GCLK_MPEG_AO GX_HIU_ADDR(0x54)
-
-#define GX_GCLK_MPEG_0_I2C BIT(9)
-#define GX_GCLK_MPEG_1_ETH BIT(3)
-
#endif /* __GX_H__ */
diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c
index 061f19a0e31..8b28bc85311 100644
--- a/arch/arm/mach-meson/eth.c
+++ b/arch/arm/mach-meson/eth.c
@@ -48,7 +48,6 @@ void meson_gx_eth_init(phy_interface_t mode, unsigned int flags)
return;
}
- /* Enable power and clock gate */
- setbits_le32(GX_GCLK_MPEG_1, GX_GCLK_MPEG_1_ETH);
+ /* Enable power gate */
clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK);
}