diff options
| author | Tim Harvey <[email protected]> | 2022-11-11 08:03:07 -0800 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2023-01-31 18:08:23 +0100 |
| commit | 3041e094e45dba1853431e88d79a990d86fa80d7 (patch) | |
| tree | 105c8095a15ff0e4b65b797f456c644ec08f0420 /arch | |
| parent | a4dc847b6017cfedd246623ed29e6f85ae0b67c6 (diff) | |
board: gateworks: venice: poll I2C lines to wait for GSC firmware
In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.
Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error message.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/imx8mm-venice-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mm-venice.dts | 12 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mn-venice-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mn-venice.dts | 12 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-venice-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-venice.dts | 12 |
6 files changed, 45 insertions, 3 deletions
diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi index 68978a0413e..6f786b9467c 100644 --- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi @@ -57,6 +57,10 @@ u-boot,dm-spl; }; +&pinctrl_i2c1_gpio { + u-boot,dm-spl; +}; + &gsc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mm-venice.dts b/arch/arm/dts/imx8mm-venice.dts index 39b030691e5..d0929908ce8 100644 --- a/arch/arm/dts/imx8mm-venice.dts +++ b/arch/arm/dts/imx8mm-venice.dts @@ -23,8 +23,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; gsc: gsc@20 { @@ -89,6 +92,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio-grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi index aea48f2d795..4af6b8b4ed8 100644 --- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi @@ -49,6 +49,10 @@ u-boot,dm-spl; }; +&pinctrl_i2c1_gpio { + u-boot,dm-spl; +}; + &gsc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-venice.dts b/arch/arm/dts/imx8mn-venice.dts index eeae225632d..9e31b37f249 100644 --- a/arch/arm/dts/imx8mn-venice.dts +++ b/arch/arm/dts/imx8mn-venice.dts @@ -23,8 +23,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; gsc: gsc@20 { @@ -89,6 +92,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio-grp { + fsl,pins = < + MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3 + MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 diff --git a/arch/arm/dts/imx8mp-venice-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-u-boot.dtsi index 96b9fa89cf4..f9068ebfbee 100644 --- a/arch/arm/dts/imx8mp-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-u-boot.dtsi @@ -57,6 +57,10 @@ u-boot,dm-spl; }; +&pinctrl_i2c1_gpio { + u-boot,dm-spl; +}; + &gsc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-venice.dts b/arch/arm/dts/imx8mp-venice.dts index 6b1a7f1a89d..77e5ac423db 100644 --- a/arch/arm/dts/imx8mp-venice.dts +++ b/arch/arm/dts/imx8mp-venice.dts @@ -23,8 +23,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; status = "okay"; gsc: gsc@20 { @@ -89,6 +92,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1grp-gpio-grp { + fsl,pins = < + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x400001c3 + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x400001c3 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c3 |