diff options
| author | Yinbo Zhu <[email protected]> | 2020-04-14 17:24:48 +0800 |
|---|---|---|
| committer | Priyanka Jain <[email protected]> | 2020-04-20 13:35:11 +0530 |
| commit | 316fc6ff762b44044ef164f51e042cb8a90dc147 (patch) | |
| tree | 2efee8fdfd4cb13ec3305c654c467fab703a5bfb /arch | |
| parent | 3460a6bba1dfeb48e6006a73c1aa9a6ba53a526b (diff) | |
armv8: ls1028a: define esdhc_status_fixup
This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.
Signed-off-by: Yinbo Zhu <[email protected]>
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 299201b1570..c2fbc23b112 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -232,7 +232,12 @@ #define DCFG_PORSR1 0x000 #define DCFG_PORSR1_RCW_SRC 0xff800000 #define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000 +#define DCFG_RCWSR12 0x12c +#define DCFG_RCWSR12_SDHC_SHIFT 24 +#define DCFG_RCWSR12_SDHC_MASK 0x7 #define DCFG_RCWSR13 0x130 +#define DCFG_RCWSR13_SDHC_SHIFT 3 +#define DCFG_RCWSR13_SDHC_MASK 0x7 #define DCFG_RCWSR13_DSPI (0 << 8) #define DCFG_RCWSR15 0x138 #define DCFG_RCWSR15_IFCGRPABASE_QSPI 0x3 |