diff options
| author | Tom Rini <[email protected]> | 2024-07-08 08:45:02 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-07-08 08:45:02 -0600 |
| commit | 4480b53b194e388b37311eb63e1d7d73d3672b32 (patch) | |
| tree | 77c0bb7a508d69c85f59bce7e1700f9ff243b3a3 /arch | |
| parent | 97d638e77a643722911e988a3a0f0ed3874a9101 (diff) | |
| parent | 3d4c29258f8b4c4a5cf4ce79fb1ac80f66e4cf65 (diff) | |
Merge tag 'u-boot-imx-master-20240706' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/21504
- Fixes for i.MX8M and i.MX93 clk-composite.
- Set CAN oscillator frequency based on model on verdin-imx8mm.
- Enable CAAM for phycore-imx8mp_defconfig.
- Miscellaneous improvements for Gateworks i.MX8M boards.
- Fix initramfs boot on msc_sm2s_imx8mp.
- Fixe EQoS on imx8mp-beacon-kit.
- Fix error message in fsl_esdhc_imx.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts | 5 | ||||
| -rw-r--r-- | arch/arm/dts/imx8mp-dhcom-som.dtsi | 8 |
4 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9968e819550..45af7662075 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1298,6 +1298,7 @@ targets += $(dtb-y) # Add any required device tree compiler flags here DTC_FLAGS += -a 0x8 +DTC_FLAGS_imx8mp-dhcom-som-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format DTC_FLAGS_imx8mp-dhcom-pdk3-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format PHONY += dtbs diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi index ed183f83a77..380146596c0 100644 --- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi @@ -32,12 +32,6 @@ bootph-pre-ram; }; -&eqos { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; - /delete-property/ assigned-clock-rates; -}; - ðphy0 { reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; reset-assert-us = <15000>; diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts index 0e5d329b149..b2154d57e48 100644 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts @@ -35,6 +35,7 @@ ðphy0f { /* SMSC LAN8740Ai */ pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; + reg = <0>; }; ðphy0g { /* Micrel KSZ9131RNXI */ @@ -42,6 +43,10 @@ reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; }; +ðphy1f { /* SMSC LAN8740Ai */ + reg = <1>; +}; + &i2c3 { adc@48 { compatible = "ti,tla2024"; diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi index b504d36818b..f2d99d05854 100644 --- a/arch/arm/dts/imx8mp-dhcom-som.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi @@ -100,14 +100,14 @@ #size-cells = <0>; /* Up to one of these two PHYs may be populated. */ - ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */ + ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio3>; interrupts = <19 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy0>; pinctrl-names = "default"; - reg = <0>; + reg = <1>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>; @@ -146,14 +146,14 @@ #size-cells = <0>; /* Up to one PHY may be populated. */ - ethphy1f: ethernet-phy@1 { /* SMSC LAN8740Ai */ + ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio4>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy1>; pinctrl-names = "default"; - reg = <1>; + reg = <2>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; |
