Merge patch series "arm: airoha: add support for en7523 based boards"

Mikhail Kshevetskiy <[email protected]> says:

This patch series adds basic support for the boards based on Airoha
EN7523/EN7529/EN7562 SoCs. Due to ATF restrictions these boards are
able to run 32-bit OS only.

This patch series adds support for the following hardware:
 * console UART
 * ethernet controller/switch
 * spinand flash (in non-dma mode)

The following issues may be expected:
 * Extra slow UBI attaching in U-Boot (up to 20 sec with fastmap enabled).
   This is caused by the lack of DMA support in the U-Boot airoha-snfi driver.
 * Linux airoha-snfi driver in some cases might damage you flash data
   (see: https://lore.kernel.org/lkml/[email protected]/)
 * Latest linux kernel is recommended to properly support flashes
   with more than one plane per lun
   (see: https://lore.kernel.org/lkml/[email protected]/)
 * It's NOT recommended to use flashes working in continuous mode because
   U-Boot airoha-snfi driver does not support such flashes properly.

The patches was tested on the board:
 - SoC: Airoha EN7562
 - RAM: 512 MB
 - SPI NAND: 4 Gbit, made by Toshiba
 - Linux boot: was NOT tested

The U-Boot was chain-loaded from the running U-Boot. Airoha ATF-2.3 does
not allow easily chain-loading of U-Boot from U-Boot, so a special FIT
image (mimic linux kernel) was created

1) Create u-boot.its file with the following contents:

=== cut here ===
/dts-v1/;

/ {
	description = "ARM OpenWrt FIT (Flattened Image Tree)";
	#address-cells = <1>;

	images {
		u-boot-ram {
			description = "OpenWrt U-Boot RAM image";
			data = /incbin/("u-boot.bin.lzma");
			type = "kernel";
			arch = "arm";
			os = "linux";
			compression = "lzma";
			load = <0x81e00000>;
			entry = <0x81e00000>;
			hash@1 {
				algo = "crc32";
			};
			hash@2 {
				algo = "sha1";
			};
		};

		fdt-1 {
			description = "OpenWrt device tree blob";

			data = /incbin/("dts/upstream/src/arm/airoha/en7523-evb.dtb");
			type = "flat_dt";

			arch = "arm";
			compression = "none";
			hash@1 {
				algo = "crc32";
			};
			hash@2 {
				algo = "sha1";
			};
		};
	};

	configurations {
		default = "config-ram-uboot";
		config-ram-uboot {
			description = "OpenWrt RAM U-Boot";
			kernel = "u-boot-ram";
			fdt = "fdt-1";
		};
	};
};
==================

2) Create u-boot.itb image to chain-load new u-boot from the old one

  lzma_alone e u-boot.bin u-boot.bin.lzma
  mkimage -f u-boot.its u-boot.itb

3) Load new u-boot from the old one

  U-Boot> tftpboot u-boot.itb && bootm

Link: https://lore.kernel.org/r/[email protected]

12 files changed, 217 insertions, 0 deletions

diff --git a/arch/arm/dts/en7523-evb-u-boot.dtsi b/arch/arm/dts/en7523-evb-u-boot.dtsi
new file mode 100644
index 00000000000..c109d6794fb
--- /dev/null
+++ b/arch/arm/dts/en7523-evb-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+	/* When running as a first-stage bootloader this isn't filled in automatically */
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+#include "en7523-u-boot.dtsi"
diff --git a/arch/arm/dts/en7523-u-boot.dtsi b/arch/arm/dts/en7523-u-boot.dtsi
new file mode 100644
index 00000000000..90838c00a85
--- /dev/null
+++ b/arch/arm/dts/en7523-u-boot.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <dt-bindings/reset/airoha,en7523-reset.h>
+
+/ {
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		atf-reserved-memory@80000000 {
+			no-map;
+			reg = <0x80000000 0x40000>;
+		};
+	};
+
+	scu: system-controller@1fa20000 {
+		compatible = "airoha,en7523-scu";
+		reg = <0x1fa20000 0x400>,
+		      <0x1fb00000 0x1000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	eth: ethernet@1fb50000 {
+		compatible = "airoha,en7523-eth";
+		reg = <0x1fb50000 0x2600>,
+		      <0x1fb54000 0x2000>,
+		      <0x1fb56000 0x2000>;
+		reg-names = "fe", "qdma0", "qdma1";
+
+		resets = <&scu EN7523_FE_RST>,
+			 <&scu EN7523_FE_PDMA_RST>,
+			 <&scu EN7523_FE_QDMA_RST>,
+			 <&scu EN7523_DUAL_HSI0_MAC_RST>,
+			 <&scu EN7523_DUAL_HSI1_MAC_RST>,
+			 <&scu EN7523_HSI_MAC_RST>;
+		reset-names = "fe", "pdma", "qdma",
+			      "hsi0-mac", "hsi1-mac", "hsi-mac";
+	};
+
+	switch: switch@1fb58000 {
+		compatible = "airoha,en7523-switch";
+		reg = <0x1fb58000 0x8000>;
+	};
+
+	snfi: spi@1fa10000 {
+		compatible = "airoha,en7523-snand", "airoha,en7581-snand";
+		reg = <0x1fa10000 0x140>,
+		      <0x1fa11000 0x600>;
+
+		clocks = <&scu EN7523_CLK_SPI>;
+		clock-names = "spi";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		spi_nand: nand@0 {
+			compatible = "spi-nand";
+			reg = <0>;
+			spi-max-frequency = <50000000>;
+			spi-tx-bus-width = <1>;
+			spi-rx-bus-width = <1>;
+		};
+	};
+};
+
+&uart1 {
+	bootph-all;
+};
diff --git a/arch/arm/include/asm/arch-airoha/scu-regmap.h b/arch/arm/include/asm/arch-airoha/scu-regmap.h
new file mode 100644
index 00000000000..31fc23d8c4d
--- /dev/null
+++ b/arch/arm/include/asm/arch-airoha/scu-regmap.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ */
+#ifndef __AIROHA_SCU_REGMAP__
+#define __AIROHA_SCU_REGMAP__
+
+#include <regmap.h>
+
+struct regmap *airoha_get_scu_regmap(void);
+struct regmap *airoha_get_chip_scu_regmap(void);
+
+#endif
diff --git a/arch/arm/include/asm/arch-an7581 b/arch/arm/include/asm/arch-an7581
new file mode 120000
index 00000000000..d2317ed3bc3
--- /dev/null
+++ b/arch/arm/include/asm/arch-an7581
@@ -0,0 +1 @@
+arch-airoha
\ No newline at end of file
diff --git a/arch/arm/include/asm/arch-en7523 b/arch/arm/include/asm/arch-en7523
new file mode 120000
index 00000000000..d2317ed3bc3
--- /dev/null
+++ b/arch/arm/include/asm/arch-en7523
@@ -0,0 +1 @@
+arch-airoha
\ No newline at end of file
diff --git a/arch/arm/mach-airoha/Kconfig b/arch/arm/mach-airoha/Kconfig
index be3562ae3ff..b9cd0a413e1 100644
--- a/arch/arm/mach-airoha/Kconfig
+++ b/arch/arm/mach-airoha/Kconfig
@@ -6,6 +6,17 @@ config SYS_VENDOR
 choice
 	prompt "Airoha board select"
 
+config TARGET_EN7523
+	bool "Airoha EN7523 SoC"
+	select CPU_V7A
+	select ARMV7_SET_CORTEX_SMPEN
+	help
+	  The Airoha EN7523 family (en7523/en7529/en7562) is an ARM-based
+	  SoCs with a dual-core CPU. It comes with Wi-Fi 5/6 support and
+	  connectivity to Ethernet PHY, DDR, PCIe, USB, UART and VoIP.
+	  With advanced hardware design, EN7523 provides high processing
+	  performance and low power consumption.
+
 config TARGET_AN7581
 	bool "Airoha AN7581 SoC"
 	select ARM64
@@ -20,12 +31,15 @@ config TARGET_AN7581
 endchoice
 
 config SYS_SOC
+	default "en7523" if TARGET_EN7523
 	default "an7581" if TARGET_AN7581
 
 config SYS_BOARD
+	default "en7523" if TARGET_EN7523
 	default "an7581" if TARGET_AN7581
 
 config SYS_CONFIG_NAME
+	default "en7523" if TARGET_EN7523
 	default "an7581" if TARGET_AN7581
 
 endif
diff --git a/arch/arm/mach-airoha/Makefile b/arch/arm/mach-airoha/Makefile
index 215a300373b..91395b8a850 100644
--- a/arch/arm/mach-airoha/Makefile
+++ b/arch/arm/mach-airoha/Makefile
@@ -2,4 +2,5 @@
 
 obj-y	+= cpu.o
 
+obj-$(CONFIG_TARGET_EN7523) += en7523/
 obj-$(CONFIG_TARGET_AN7581) += an7581/
diff --git a/arch/arm/mach-airoha/an7581/Makefile b/arch/arm/mach-airoha/an7581/Makefile
index 886ab7e4eb9..51f978aa101 100644
--- a/arch/arm/mach-airoha/an7581/Makefile
+++ b/arch/arm/mach-airoha/an7581/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier:	GPL-2.0
 
 obj-y += init.o
+obj-y += scu-regmap.o
diff --git a/arch/arm/mach-airoha/an7581/scu-regmap.c b/arch/arm/mach-airoha/an7581/scu-regmap.c
new file mode 100644
index 00000000000..7beeaecccc1
--- /dev/null
+++ b/arch/arm/mach-airoha/an7581/scu-regmap.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ */
+
+#include <syscon.h>
+#include <linux/err.h>
+#include <asm/arch/scu-regmap.h>
+
+struct regmap *airoha_get_scu_regmap(void)
+{
+	ofnode node;
+
+	node = ofnode_by_compatible(ofnode_null(), "airoha,en7581-scu");
+	if (!ofnode_valid(node))
+		return ERR_PTR(-EINVAL);
+
+	return syscon_node_to_regmap(node);
+}
+
+struct regmap *airoha_get_chip_scu_regmap(void)
+{
+	ofnode node;
+
+	node = ofnode_by_compatible(ofnode_null(), "airoha,en7581-chip-scu");
+	if (!ofnode_valid(node))
+		return ERR_PTR(-EINVAL);
+
+	return syscon_node_to_regmap(node);
+}
diff --git a/arch/arm/mach-airoha/en7523/Makefile b/arch/arm/mach-airoha/en7523/Makefile
new file mode 100644
index 00000000000..51f978aa101
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier:	GPL-2.0
+
+obj-y += init.o
+obj-y += scu-regmap.o
diff --git a/arch/arm/mach-airoha/en7523/init.c b/arch/arm/mach-airoha/en7523/init.c
new file mode 100644
index 00000000000..c1c1eeabdf5
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/init.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ */
+#include <fdtdec.h>
+#include <init.h>
+#include <sysreset.h>
+#include <asm/system.h>
+#include <linux/io.h>
+
+int print_cpuinfo(void)
+{
+	printf("CPU:   Airoha EN7523/EN7529/EN7562\n");
+	return 0;
+}
+
+int dram_init(void)
+{
+	return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
+
+void __noreturn reset_cpu(void)
+{
+	writel(0x80000000, 0x1FB00040);
+	while (1) {
+		/* loop forever */
+	}
+}
diff --git a/arch/arm/mach-airoha/en7523/scu-regmap.c b/arch/arm/mach-airoha/en7523/scu-regmap.c
new file mode 100644
index 00000000000..1e201cb060c
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/scu-regmap.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ */
+
+#include <dm/ofnode.h>
+#include <linux/err.h>
+#include <asm/arch/scu-regmap.h>
+
+static struct regmap *airoha_scu_node_regmap_by_index(unsigned int index)
+{
+	struct regmap *map;
+	ofnode node;
+	int err;
+
+	node = ofnode_by_compatible(ofnode_null(), "airoha,en7523-scu");
+	if (!ofnode_valid(node))
+		return ERR_PTR(-EINVAL);
+
+	/* CHIP_SCU (index=0), SCU (index=1) */
+	err = regmap_init_mem_index(node, &map, index);
+	if (err)
+		return ERR_PTR(err);
+
+	return map;
+}
+
+struct regmap *airoha_get_scu_regmap(void)
+{
+	/* CHIP_SCU (index=0), SCU (index=1) */
+	return airoha_scu_node_regmap_by_index(1);
+}
+
+struct regmap *airoha_get_chip_scu_regmap(void)
+{
+	/* CHIP_SCU (index=0), SCU (index=1) */
+	return airoha_scu_node_regmap_by_index(0);
+}