diff options
| author | Tom Rini <[email protected]> | 2019-02-13 07:12:29 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2019-02-13 07:12:29 -0500 |
| commit | 63f7e3fca391a50a499fed828fe16325fdee45f3 (patch) | |
| tree | 6214d5fe9a24d21b9a729a1bda3fdd22e442d298 /arch | |
| parent | b1b1bab7f92b838a252ab977f56d9c3584c14fb7 (diff) | |
| parent | 823c233b7ab95169ea4428b2821b72b8887b47b0 (diff) | |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2019-02-13
Goodness this time around:
- HII protocol, finally allows us to run the UEFI Shell!
(experimantal, disabled by default)
- efi selftest now available on Cortex-M
- NVMe support for distro boot
- Lots of code cleanup
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/exception_level.c | 56 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/smccc-call.S | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/exception_level.c | 55 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/smccc-call.S | 2 | ||||
| -rw-r--r-- | arch/arm/lib/Makefile | 6 | ||||
| -rw-r--r-- | arch/x86/include/asm/string.h | 31 | ||||
| -rw-r--r-- | arch/x86/lib/Makefile | 2 |
9 files changed, 146 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 4f4647c90ac..8c955d0d528 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_EFI_LOADER) += sctlr.o +obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o endif ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c new file mode 100644 index 00000000000..274f03d8bbb --- /dev/null +++ b/arch/arm/cpu/armv7/exception_level.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv7 specific code required for leaving the + * secure mode before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/armv7.h> +#include <asm/secure.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restore the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Operating systems may expect to run in non-secure mode. Here we check if + * we are running in secure mode and switch to non-secure mode if necessary. + */ +void switch_to_non_secure_mode(void) +{ + static bool is_nonsec; + struct jmp_buf_data non_secure_jmp; + + if (armv7_boot_nonsec() && !is_nonsec) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to HYP */ + armv7_init_nonsec(); + is_nonsec = true; + secure_ram_addr(_do_nonsec_entry)(entry_non_secure, + (uintptr_t)&non_secure_jmp, + 0, 0); + } +} diff --git a/arch/arm/cpu/armv7/smccc-call.S b/arch/arm/cpu/armv7/smccc-call.S index eae69e36c3c..f70728f2c4a 100644 --- a/arch/arm/cpu/armv7/smccc-call.S +++ b/arch/arm/cpu/armv7/smccc-call.S @@ -7,7 +7,9 @@ #include <asm/opcodes-sec.h> #include <asm/opcodes-virt.h> +#ifdef CONFIG_EFI_LOADER .section .text.efi_runtime +#endif #define UNWIND(x...) /* diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 4c4b13c9e75..a5f54330e38 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -14,6 +14,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o else obj-y += exceptions.o +obj-y += exception_level.o endif obj-y += cache.o obj-y += tlb.o diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c new file mode 100644 index 00000000000..57824eb2ac8 --- /dev/null +++ b/arch/arm/cpu/armv8/exception_level.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv8 specific code required to adjust the exception + * level before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restore the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Exception level EL3 is meant to be used by the secure monitor only (ARM + * trusted firmware being one embodiment). The operating system shall be + * started at exception level EL2. So here we check the exception level + * and switch it if necessary. + */ +void switch_to_non_secure_mode(void) +{ + struct jmp_buf_data non_secure_jmp; + + /* On AArch64 we need to make sure we call our payload in < EL3 */ + if (current_el() == 3) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to EL2 */ + + /* Move into EL2 and keep running there */ + armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0, + (uintptr_t)entry_non_secure, ES_TO_AARCH64); + } +} diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index 86de4b4089d..dc92b28777c 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -6,7 +6,9 @@ #include <linux/arm-smccc.h> #include <generated/asm-offsets.h> +#ifdef CONFIG_EFI_LOADER .section .text.efi_runtime +#endif .macro SMCCC instr .cfi_startproc diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 655727f4312..48ee6c3c603 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -106,5 +106,9 @@ CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI) CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI) extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC) -extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC) +# TODO: As of v2019.01 the relocation code for the EFI application cannot +# be built on ARMv7-M. +ifndef CONFIG_CPU_V7M +#extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC) +endif extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h index 38afd236843..c15b264a5c0 100644 --- a/arch/x86/include/asm/string.h +++ b/arch/x86/include/asm/string.h @@ -9,22 +9,37 @@ extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n); #undef __HAVE_ARCH_STRRCHR -extern char * strrchr(const char * s, int c); +extern char *strrchr(const char *s, int c); #undef __HAVE_ARCH_STRCHR -extern char * strchr(const char * s, int c); +extern char *strchr(const char *s, int c); + +#ifdef CONFIG_X86_64 + +#undef __HAVE_ARCH_MEMCPY +extern void *memcpy(void *, const void *, __kernel_size_t); + +#undef __HAVE_ARCH_MEMMOVE +extern void *memmove(void *, const void *, __kernel_size_t); + +#undef __HAVE_ARCH_MEMSET +extern void *memset(void *, int, __kernel_size_t); + +#else #define __HAVE_ARCH_MEMCPY -extern void * memcpy(void *, const void *, __kernel_size_t); +extern void *memcpy(void *, const void *, __kernel_size_t); #define __HAVE_ARCH_MEMMOVE -extern void * memmove(void *, const void *, __kernel_size_t); - -#undef __HAVE_ARCH_MEMCHR -extern void * memchr(const void *, int, __kernel_size_t); +extern void *memmove(void *, const void *, __kernel_size_t); #define __HAVE_ARCH_MEMSET -extern void * memset(void *, int, __kernel_size_t); +extern void *memset(void *, int, __kernel_size_t); + +#endif /* CONFIG_X86_64 */ + +#undef __HAVE_ARCH_MEMCHR +extern void *memchr(const void *, int, __kernel_size_t); #undef __HAVE_ARCH_MEMZERO extern void memzero(void *ptr, __kernel_size_t n); diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 1e8efcc44f9..56fd680033b 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -7,6 +7,7 @@ ifndef CONFIG_X86_64 obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o +obj-y += string.o endif ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_BOOTM) += bootm.o @@ -32,7 +33,6 @@ obj-$(CONFIG_X86_RAMTEST) += ramtest.o obj-$(CONFIG_INTEL_MID) += scu.o obj-y += sections.o obj-y += sfi.o -obj-y += string.o obj-y += acpi.o obj-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.o ifndef CONFIG_QEMU |
