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authorSimon Glass <[email protected]>2024-08-21 10:19:05 -0600
committerTom Rini <[email protected]>2024-08-26 14:05:38 -0600
commit7d08262ec37219b9c6d9285b17c7af8fb2ea562a (patch)
treec8cb6872100f2c46ef9dbf1ac47da2976bd42091 /arch
parentf44fded23620e264525e482efbc2e061fab5702b (diff)
global_data: Remove pci_ram_top
This field is set but not used. Drop it. Signed-off-by: Simon Glass <[email protected]>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/board2.c4
-rw-r--r--arch/arm/mach-tegra/cboot.c4
-rw-r--r--arch/x86/cpu/i386/cpu.c8
3 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 479137e457c..7971e3b68d5 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -423,10 +423,6 @@ int dram_init_banksize(void)
gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
-#ifdef CONFIG_PCI
- gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
-#endif
-
#ifdef CONFIG_PHYS_64BIT
if (gd->ram_size > SZ_2G) {
gd->bd->bi_dram[1].start = 0x100000000;
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index c12543d71ac..e2342b2aece 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -189,10 +189,6 @@ int cboot_dram_init_banksize(void)
gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size;
}
-#ifdef CONFIG_PCI
- gd->pci_ram_top = ram_top;
-#endif
-
return 0;
}
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index db2727d7485..934e98ac582 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -412,12 +412,6 @@ int cpu_phys_address_size(void)
return 32;
}
-/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
-static void setup_pci_ram_top(void)
-{
- gd_set_pci_ram_top(0x80000000U);
-}
-
static void setup_mtrr(void)
{
u64 mtrr_cap;
@@ -469,7 +463,6 @@ int x86_cpu_init_f(void)
setup_cpu_features();
setup_identity();
setup_mtrr();
- setup_pci_ram_top();
/* Set up the i8254 timer if required */
if (IS_ENABLED(CONFIG_I8254_TIMER))
@@ -483,7 +476,6 @@ int x86_cpu_reinit_f(void)
long addr;
setup_identity();
- setup_pci_ram_top();
addr = locate_coreboot_table();
if (addr >= 0) {
gd->arch.coreboot_table = addr;