diff options
| author | Tom Rini <[email protected]> | 2020-10-29 11:30:29 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2020-10-29 11:30:29 -0400 |
| commit | 8d7f3fcb4a20bade1a940cea3e3b6983587d0fc9 (patch) | |
| tree | 52a8fec4f072c262a6f55a99b790d36d65f96462 /arch | |
| parent | 47754334b164eae4fde538c406ff3678dfb05042 (diff) | |
| parent | aaedaaae63921c7edefd0f14ec5f1921a7641454 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch)
- Armada 8k: Use ATF serdes init instead of the "old" U-Boot version
(Baruch)
- Minor update to Octeon TX/TX2 defconfig (Stefan)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/armada-cp110-master.dtsi | 15 | ||||
| -rw-r--r-- | arch/arm/dts/armada-cp110-slave.dtsi | 16 |
2 files changed, 25 insertions, 6 deletions
diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index cd5c974482e..7d0d31da306 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -285,15 +285,18 @@ }; cpm_nand: nand@720000 { - compatible = "marvell,mvebu-pxa3xx-nand"; - reg = <0x720000 0x100>; + compatible = "marvell,armada-8k-nand-controller", + "marvell,armada370-nand-controller"; + reg = <0x720000 0x54>; #address-cells = <1>; - - clocks = <&cpm_syscon0 1 2>; + #size-cells = <0>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core", "reg"; + clocks = <&cpm_syscon0 1 2>, + <&cpm_syscon0 1 17>; + marvell,system-controller = <&cpm_syscon0>; nand-enable-arbiter; num-cs = <1>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; status = "disabled"; }; diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index b426a4eb691..6cf21778370 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -267,6 +267,22 @@ utmi-port = <UTMI_PHY_TO_USB3_HOST0>; status = "disabled"; }; + + cps_nand: nand@720000 { + compatible = "marvell,armada-8k-nand-controller", + "marvell,armada370-nand-controller"; + reg = <0x720000 0x54>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core", "reg"; + clocks = <&cps_syscon0 1 2>, + <&cps_syscon0 1 17>; + marvell,system-controller = <&cps_syscon0>; + nand-enable-arbiter; + num-cs = <1>; + status = "disabled"; + }; }; cps_pcie0: pcie@f4600000 { |