Merge tag 'u-boot-rockchip-2026.10-20260710' of https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip

CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip/-/pipelines/597

- Add new rockchip custodian,
- Remove inactive rockchip custodian,
- Preemptively fix rk3528/rk356x DTS issue that will come with 7.1
  upstream DTS sync,
- Fix typo in doc,
- Fix variable used before being set in rockchip_nfc,
- Fix asm-operand-widths clang warning for RK3528, RK3576 and RK3588,
- Work around HW undefined state for NVMEs on RK3588 Jaguar,
- Added support for new devices:
  - LinkEase EasePi R1
  - 9Tripod X3568 v4

6 files changed, 11 insertions, 11 deletions

diff --git a/arch/arm/dts/rk3528-u-boot.dtsi b/arch/arm/dts/rk3528-u-boot.dtsi
index a18d33b3d36..31345df6295 100644
--- a/arch/arm/dts/rk3528-u-boot.dtsi
+++ b/arch/arm/dts/rk3528-u-boot.dtsi
@@ -23,7 +23,7 @@
 			reg = <0x0 0xffc50000 0x0 0x200>;
 		};
 
-		otp: nvmem@ffce0000 {
+		otp: efuse@ffce0000 {
 			compatible = "rockchip,rk3528-otp";
 			reg = <0x0 0xffce0000 0x0 0x4000>;
 		};
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 738b9673d35..d09dab35b31 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -21,15 +21,9 @@
 		bootph-all;
 	};
 
-	otp: nvmem@fe38c000 {
+	otp: efuse@fe38c000 {
 		compatible = "rockchip,rk3568-otp";
 		reg = <0x0 0xfe38c000 0x0 0x4000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		cpu_id: id@a {
-			reg = <0x0a 0x10>;
-		};
 	};
 };
 
diff --git a/arch/arm/dts/rk3588-jaguar-u-boot.dtsi b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi
index dcda4f99d6e..0fbbb50fc5a 100644
--- a/arch/arm/dts/rk3588-jaguar-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi
@@ -21,6 +21,12 @@
 	bootph-some-ram;
 };
 
+&gpio0 {
+	/* Need gpio0 in SPL for spl_board_init() to control GPIO0_D0 */
+	/* TODO: once we have a U-Boot TPL, use bootph-pre-sram; */
+	bootph-pre-ram;
+};
+
 &gpio2 {
 	bootph-pre-ram;
 	bootph-some-ram;
diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c
index f9bfc445b85..a39cb8be9a1 100644
--- a/arch/arm/mach-rockchip/rk3528/rk3528.c
+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c
@@ -95,7 +95,7 @@ void rockchip_stimer_init(void)
 	if (reg & TIMER_EN)
 		return;
 
-	asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+	asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
 	writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);
diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c
index 1def4e87971..e3e93f66395 100644
--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
@@ -131,7 +131,7 @@ void rockchip_stimer_init(void)
 	if (reg & TIMER_EN)
 		return;
 
-	asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+	asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
 	writel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index c8de1a21024..f69792670d0 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -167,7 +167,7 @@ void rockchip_stimer_init(void)
 	if (reg & TIMER_EN)
 		return;
 
-	asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+	asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
 	writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
 	writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);