diff options
| author | Jonas Karlman <[email protected]> | 2023-07-22 13:30:23 +0000 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2023-07-28 18:45:03 +0800 |
| commit | a76aa6ffa6cd25eed282147f6e31b9c09272f930 (patch) | |
| tree | cd51f10f3910f4a2ca918ce7dd8179f2b7b6bc6c /arch | |
| parent | 583a82d5e2702f2c8aadcd75d416d6e45dd5188a (diff) | |
rockchip: rk3568-rock-3a: Enable PCIe and NVMe support
Add missing pinctrl and defconfig options to enable PCIe and NVMe
support on Radxa ROCK 3 Model A.
Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1.
The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is
restored to the perstn pin, a workaround to avoid having to define
a new rockchip,pins.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi index bbf54f888fa..9ee7b494ee2 100644 --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi @@ -36,8 +36,22 @@ bootph-all; }; +&pcie2x1 { + pinctrl-0 = <&pcie20m1_pins &pcie_reset_h>; +}; + +&pcie3x2 { + pinctrl-0 = <&pcie30x2m1_pins &pcie3x2_reset_h>; +}; + &pinctrl { bootph-all; + + pcie { + pcie3x2_reset_h: pcie3x2-reset-h { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pcfg_pull_none { |