diff options
| author | Zixun LI <[email protected]> | 2025-04-28 11:16:26 +0200 |
|---|---|---|
| committer | Eugen Hristev <[email protected]> | 2025-06-19 13:56:41 +0300 |
| commit | ac46b48d30c29a8a5f7ade07c666e12f88bfb169 (patch) | |
| tree | 80c9ecf6059595a34105d8d8cd72299982adc022 /arch | |
| parent | c8bf2d686d45ff508e953d81c718e4dfd7d8ce62 (diff) | |
watchdog: at91sam9_wdt: Add SAM9X60 support
SAM9X60 has a slightly different watchdog implementation:
- Timer value moved into a new register WLR
- Some MR register fields have their position changed
This patch add SAM9X60 support, also adds a compatible
for SAMA5D4 which is the same as existing SAM9260.
Signed-off-by: Zixun LI <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91_wdt.h | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h index a203210cc6b..3780f0bfe40 100644 --- a/arch/arm/mach-at91/include/mach/at91_wdt.h +++ b/arch/arm/mach-at91/include/mach/at91_wdt.h @@ -19,9 +19,16 @@ #else +enum { + AT91_WDT_MODE_SAM9260 = 0, + AT91_WDT_MODE_SAM9X60 = 1 +}; + struct at91_wdt_priv { void __iomem *regs; u32 mr; + u32 wddis; + u8 mode; }; #endif @@ -33,14 +40,22 @@ struct at91_wdt_priv { /* Watchdog Mode Register*/ #define AT91_WDT_MR 0x04 -#define AT91_WDT_MR_WDV(x) (x & 0xfff) +#define AT91_WDT_MR_WDV(x) ((x) & 0xfff) +#define AT91_SAM9X60_MR_PERIODRST 0x00000010 #define AT91_WDT_MR_WDFIEN 0x00001000 +#define AT91_SAM9X60_MR_WDDIS 0x00001000 #define AT91_WDT_MR_WDRSTEN 0x00002000 #define AT91_WDT_MR_WDRPROC 0x00004000 #define AT91_WDT_MR_WDDIS 0x00008000 -#define AT91_WDT_MR_WDD(x) ((x & 0xfff) << 16) +#define AT91_WDT_MR_WDD(x) (((x) & 0xfff) << 16) #define AT91_WDT_MR_WDDBGHLT 0x10000000 +#define AT91_SAM9X60_MR_WDIDLEHLT 0x10000000 #define AT91_WDT_MR_WDIDLEHLT 0x20000000 +#define AT91_SAM9X60_MR_WDDBGHLT 0x20000000 + +/* Watchdog Window Level Register */ +#define AT91_SAM9X60_WLR 0x0c +#define AT91_SAM9X60_WLR_COUNTER(x) ((x) & 0xfff) /* Hardware timeout in seconds */ #define WDT_MAX_TIMEOUT 16 |