diff options
| author | Michal Simek <[email protected]> | 2026-06-23 14:53:32 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2026-07-08 08:55:51 +0200 |
| commit | ae8f2474fe6aad8dc3cbc0f940bf8643611bc7b7 (patch) | |
| tree | 79997a6e91422423dab7586c68e36a479dbc358b /arch | |
| parent | 8a2586c3ef8cba7b5ef7a65229f322831f268b7c (diff) | |
arm64: versal2: Move board_early_init_r clock setup to mach code
board_early_init_r() programmed the IOU switch clock and the system
timestamp counter directly with readl()/writel() in board code. This is
SoC register setup rather than board policy, and the same block is
duplicated across the Xilinx SoCs.
Move it into versal2_timer_setup() in arch/arm/mach-versal2 so the board
hook only keeps the EL3 guard and calls the helper.
Signed-off-by: Michal Simek <[email protected]>
Link: https://patch.msgid.link/08e835a183c39de6f666375ac390eee6a8f3f12e.1782219202.git.michal.simek@amd.com
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-versal2/cpu.c | 43 | ||||
| -rw-r--r-- | arch/arm/mach-versal2/include/mach/sys_proto.h | 2 |
2 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-versal2/cpu.c b/arch/arm/mach-versal2/cpu.c index 2b30a81d250..07bb1a61b17 100644 --- a/arch/arm/mach-versal2/cpu.c +++ b/arch/arm/mach-versal2/cpu.c @@ -7,6 +7,8 @@ */ #include <init.h> +#include <log.h> +#include <time.h> #include <asm/armv8/mmu.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -152,6 +154,47 @@ u8 __weak versal2_get_bootmode(void) return bootmode; } +void versal2_timer_setup(void) +{ + u32 val; + + debug("iou_switch ctrl div0 %x\n", + readl(&crlapb_base->iou_switch_ctrl)); + + writel(IOU_SWITCH_CTRL_CLKACT_BIT | + (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), + &crlapb_base->iou_switch_ctrl); + + /* Global timer init - Program time stamp reference clk */ + val = readl(&crlapb_base->timestamp_ref_ctrl); + val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + + debug("ref ctrl 0x%x\n", + readl(&crlapb_base->timestamp_ref_ctrl)); + + /* Clear reset of timestamp reg */ + writel(0, &crlapb_base->rst_timestamp); + + /* + * Program freq register in System counter and + * enable system counter. + */ + writel(CONFIG_COUNTER_FREQUENCY, + &iou_scntr_secure->base_frequency_id_register); + + debug("counter val 0x%x\n", + readl(&iou_scntr_secure->base_frequency_id_register)); + + writel(IOU_SCNTRS_CONTROL_EN, + &iou_scntr_secure->counter_control_register); + + debug("scntrs control 0x%x\n", + readl(&iou_scntr_secure->counter_control_register)); + debug("timer 0x%llx\n", get_ticks()); + debug("timer 0x%llx\n", get_ticks()); +} + U_BOOT_DRVINFO(soc_amd_versal2) = { .name = "soc_amd_versal2", }; diff --git a/arch/arm/mach-versal2/include/mach/sys_proto.h b/arch/arm/mach-versal2/include/mach/sys_proto.h index b3118c208e8..b8d12d1dd3b 100644 --- a/arch/arm/mach-versal2/include/mach/sys_proto.h +++ b/arch/arm/mach-versal2/include/mach/sys_proto.h @@ -19,5 +19,7 @@ u32 versal2_pmc_multi_boot(void); u32 versal2_multi_boot_reg(void); /* Weak bootmode decode (MMIO default); a firmware/SCMI build may override */ u8 versal2_get_bootmode(void); +/* EL3 clock/timer register setup, called from board_early_init_r() */ +void versal2_timer_setup(void); #endif /* _ASM_ARCH_SYS_PROTO_H */ |