diff options
| author | Alif Zakuan Yuslaimi <[email protected]> | 2025-04-16 01:42:12 -0700 |
|---|---|---|
| committer | Tien Fong Chee <[email protected]> | 2025-04-22 11:47:40 +0800 |
| commit | b0dbc9fcb7dfb7522be25ee205997be2fb5e1bdc (patch) | |
| tree | 3af3666f09c900f1448252ecc539771f27adf4ac /arch | |
| parent | 577a60760e1e63a0976b4583c4aa060d81ccfd9e (diff) | |
arch: arm: dts: agilex5: Set SDIO_SEL GPIO pin as output
Use GPIO hogging method in device tree to set SDIO_SEL pin (portb3)
direction as output with value 0 after power-on reset.
This is to ensure stable 0V voltage reading from SDIO_SEL GPIO pin
after board init.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi index 8d6503dd091..b34af85c58d 100644 --- a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi @@ -673,6 +673,17 @@ bootph-all; }; +&gpio1 { + /* Configure GPIO 1 pin 3 as output pin with value 0 during GPIO probe */ + portb: gpio-controller@0{ + sdio_sel { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-low; + }; + }; +}; + &i2c0 { reset-names = "i2c"; }; |