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authorSimon Glass <[email protected]>2019-04-01 13:38:38 -0700
committerTom Warren <[email protected]>2019-05-24 10:13:12 -0700
commitf6ac3fab9ba2aa4b352fd8c8799c4b5091fc376c (patch)
tree844838ef56aeb758772edfb8954c021fdf644ac3 /arch
parent40920bdecc4e1b7096de6f546d7b5c2185554ba6 (diff)
tegra: Correct tegra124 clock name
The first clock type appears to have and incorrect setting for out of the mux outputs. It should be CLK_M, not OSC. Fix it and its only user. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Tom Warren <[email protected]>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/tegra124/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index 3bd6cf2afff..70916ea3c18 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -71,7 +71,7 @@ enum {
*/
#define CLK(x) CLOCK_ID_ ## x
static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
- { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(OSC),
+ { CLK(AUDIO), CLK(XCPU), CLK(PERIPH), CLK(CLK_M),
CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
MASK_BITS_31_30},
{ CLK(MEMORY), CLK(CGENERAL), CLK(PERIPH), CLK(AUDIO),