diff options
| author | Weijie Gao <[email protected]> | 2025-03-07 11:22:23 +0800 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-03-30 09:14:44 -0600 |
| commit | f87b959080d95528c93cc7fcae84768aafc75740 (patch) | |
| tree | 8701cbf8b24db08102cd7f96df37113f3ad282ab /arch | |
| parent | 2d611c2a02683ccee7b085f1f1e7b1b2edc5c773 (diff) | |
pwm: mediatek: add pwm support for MediaTek MT7987 SoC
This patch adds pwm support for MediaTek MT7987 SoC.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/mt7987-pinctrl.dtsi | 14 | ||||
| -rw-r--r-- | arch/arm/dts/mt7987.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/dts/mt7987a.dtsi | 2 |
3 files changed, 21 insertions, 11 deletions
diff --git a/arch/arm/dts/mt7987-pinctrl.dtsi b/arch/arm/dts/mt7987-pinctrl.dtsi index b5e643feffe..dfde21235b1 100644 --- a/arch/arm/dts/mt7987-pinctrl.dtsi +++ b/arch/arm/dts/mt7987-pinctrl.dtsi @@ -191,6 +191,20 @@ }; }; + pwm_pins: pwm-pins { + mux { + /* + * - pwm0 : PWM0@PIN13 + * - pwm1_0 : PWM1@PIN7 (share with JTAG) + * pwm1_1 : PWM1@PIN43 (share with i2c0) + * - pwm2_0 : PWM2@PIN12 (share with PCM) + * pwm2_1 : PWM2@PIN44 (share with i2c0) + */ + function = "pwm"; + groups = "pwm0"; + }; + }; + uart1_pins: uart1-pins { mux { function = "uart"; diff --git a/arch/arm/dts/mt7987.dtsi b/arch/arm/dts/mt7987.dtsi index fd1585f658d..4c1d597499c 100644 --- a/arch/arm/dts/mt7987.dtsi +++ b/arch/arm/dts/mt7987.dtsi @@ -389,21 +389,15 @@ }; pwm: pwm@10048000 { - compatible = "mediatek,mt7988-pwm"; + compatible = "mediatek,mt7987-pwm"; reg = <0 0x10048000 0 0x1000>; #pwm-cells = <2>; clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>, <&infracfg CLK_INFRA_66M_PWM_HCK>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>, - <&clkxtal>; - clock-names = "top", "main", "pwm1", "pwm2", "pwm3", - "pwm4","pwm5","pwm6","pwm7","pwm8"; + <&infracfg CLK_INFRA_66M_PWM_HCK>, + <&infracfg CLK_INFRA_66M_PWM_HCK>, + <&infracfg CLK_INFRA_66M_PWM_HCK>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; status = "disabled"; }; diff --git a/arch/arm/dts/mt7987a.dtsi b/arch/arm/dts/mt7987a.dtsi index 028f563fb39..bf53e89eca8 100644 --- a/arch/arm/dts/mt7987a.dtsi +++ b/arch/arm/dts/mt7987a.dtsi @@ -59,6 +59,8 @@ }; &pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; status = "okay"; }; |
