diff options
| author | Tom Rini <[email protected]> | 2025-11-07 16:04:16 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-11-07 16:45:09 -0600 |
| commit | 5e5b630eef2eecfe898b2ce3e719a6dc79211569 (patch) | |
| tree | 587e87d84e5251e9667e95c8c3c9ec58ee1409d9 /board/airoha | |
| parent | 928af44314a1a086e946ef3c0901d40bdb3e19a9 (diff) | |
| parent | 475dec28805bf0c84ce83ec06d452b4ee8b5f9a9 (diff) | |
Merge patch series "arm: airoha: add support for en7523 based boards"
Mikhail Kshevetskiy <[email protected]> says:
This patch series adds basic support for the boards based on Airoha
EN7523/EN7529/EN7562 SoCs. Due to ATF restrictions these boards are
able to run 32-bit OS only.
This patch series adds support for the following hardware:
* console UART
* ethernet controller/switch
* spinand flash (in non-dma mode)
The following issues may be expected:
* Extra slow UBI attaching in U-Boot (up to 20 sec with fastmap enabled).
This is caused by the lack of DMA support in the U-Boot airoha-snfi driver.
* Linux airoha-snfi driver in some cases might damage you flash data
(see: https://lore.kernel.org/lkml/[email protected]/)
* Latest linux kernel is recommended to properly support flashes
with more than one plane per lun
(see: https://lore.kernel.org/lkml/[email protected]/)
* It's NOT recommended to use flashes working in continuous mode because
U-Boot airoha-snfi driver does not support such flashes properly.
The patches was tested on the board:
- SoC: Airoha EN7562
- RAM: 512 MB
- SPI NAND: 4 Gbit, made by Toshiba
- Linux boot: was NOT tested
The U-Boot was chain-loaded from the running U-Boot. Airoha ATF-2.3 does
not allow easily chain-loading of U-Boot from U-Boot, so a special FIT
image (mimic linux kernel) was created
1) Create u-boot.its file with the following contents:
=== cut here ===
/dts-v1/;
/ {
description = "ARM OpenWrt FIT (Flattened Image Tree)";
#address-cells = <1>;
images {
u-boot-ram {
description = "OpenWrt U-Boot RAM image";
data = /incbin/("u-boot.bin.lzma");
type = "kernel";
arch = "arm";
os = "linux";
compression = "lzma";
load = <0x81e00000>;
entry = <0x81e00000>;
hash@1 {
algo = "crc32";
};
hash@2 {
algo = "sha1";
};
};
fdt-1 {
description = "OpenWrt device tree blob";
data = /incbin/("dts/upstream/src/arm/airoha/en7523-evb.dtb");
type = "flat_dt";
arch = "arm";
compression = "none";
hash@1 {
algo = "crc32";
};
hash@2 {
algo = "sha1";
};
};
};
configurations {
default = "config-ram-uboot";
config-ram-uboot {
description = "OpenWrt RAM U-Boot";
kernel = "u-boot-ram";
fdt = "fdt-1";
};
};
};
==================
2) Create u-boot.itb image to chain-load new u-boot from the old one
lzma_alone e u-boot.bin u-boot.bin.lzma
mkimage -f u-boot.its u-boot.itb
3) Load new u-boot from the old one
U-Boot> tftpboot u-boot.itb && bootm
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'board/airoha')
| -rw-r--r-- | board/airoha/en7523/MAINTAINERS | 4 | ||||
| -rw-r--r-- | board/airoha/en7523/Makefile | 3 | ||||
| -rw-r--r-- | board/airoha/en7523/en7523_rfb.c | 16 |
3 files changed, 23 insertions, 0 deletions
diff --git a/board/airoha/en7523/MAINTAINERS b/board/airoha/en7523/MAINTAINERS new file mode 100644 index 00000000000..c0d89bb0fe7 --- /dev/null +++ b/board/airoha/en7523/MAINTAINERS @@ -0,0 +1,4 @@ +EN7523 +M: Mikhail Kshevetskiy <[email protected]> +S: Maintained +N: en7523 diff --git a/board/airoha/en7523/Makefile b/board/airoha/en7523/Makefile new file mode 100644 index 00000000000..c6629486f21 --- /dev/null +++ b/board/airoha/en7523/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += en7523_rfb.o diff --git a/board/airoha/en7523/en7523_rfb.c b/board/airoha/en7523/en7523_rfb.c new file mode 100644 index 00000000000..aa73679d929 --- /dev/null +++ b/board/airoha/en7523/en7523_rfb.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Author: Christian Marangi <[email protected]> + */ + +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; + + return 0; +} |
