diff options
| author | Tom Rini <[email protected]> | 2026-02-02 13:39:52 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-02-02 13:39:52 -0600 |
| commit | 4b287e0a3ae4ab3159584cb5ae12c9b470716be8 (patch) | |
| tree | 5c72960ce81d252539e299169fd1320b440e873f /board/phytec | |
| parent | 22129bf4733d78da046337440e85a9e49ca1a421 (diff) | |
| parent | 2a6935eee25e09584dbbe4565b00e33de9ef325d (diff) | |
Merge patch series "arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs"
This series from Dominik Haller <[email protected]> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'board/phytec')
| -rw-r--r-- | board/phytec/phycore_am68x/Kconfig | 41 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/MAINTAINERS | 14 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/Makefile | 6 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/board-cfg.yaml | 36 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/phycore-am68x.c | 97 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/phycore_am68x.env | 22 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/pm-cfg.yaml | 12 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/rm-cfg.yaml | 2523 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/sec-cfg.yaml | 379 |
9 files changed, 3130 insertions, 0 deletions
diff --git a/board/phytec/phycore_am68x/Kconfig b/board/phytec/phycore_am68x/Kconfig new file mode 100644 index 00000000000..37912fb4ed3 --- /dev/null +++ b/board/phytec/phycore_am68x/Kconfig @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only OR MIT +# +# Copyright (C) 2025 PHYTEC Messtechnik GmbH +# Author: Dominik Haller <[email protected]> + +if TARGET_PHYCORE_AM68X_A72 + +config SYS_BOARD + default "phycore_am68x" + +config SYS_VENDOR + default "phytec" + +config SYS_CONFIG_NAME + default "phycore_am68x" + +config ENV_SOURCE_FILE + default "phycore_am68x" + +source "board/phytec/common/Kconfig" + +endif + +if TARGET_PHYCORE_AM68X_R5 + +config SYS_BOARD + default "phycore_am68x" + +config SYS_VENDOR + default "phytec" + +config SYS_CONFIG_NAME + default "phycore_am68x" + +config ENV_SOURCE_FILE + default "phycore_am68x" + +source "board/phytec/common/Kconfig" +source "board/phytec/common/k3/Kconfig" + +endif diff --git a/board/phytec/phycore_am68x/MAINTAINERS b/board/phytec/phycore_am68x/MAINTAINERS new file mode 100644 index 00000000000..5e175fdb9ef --- /dev/null +++ b/board/phytec/phycore_am68x/MAINTAINERS @@ -0,0 +1,14 @@ +phyCORE-AM68x +M: Dominik Haller <[email protected]> +W: https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/ +S: Maintained +F: arch/arm/dts/k3-am68-phycore-som-ddr4-4gb.dtsi +F: arch/arm/dts/k3-am68-phyboard-izar-u-boot.dtsi +F: arch/arm/dts/k3-am68-phycore-som-binman.dtsi +F: arch/arm/dts/k3-am68-r5-phycore-som-4gb.dts +F: board/phytec/phycore_am68x/ +F: configs/phycore_am68x_a72_defconfig +F: configs/phycore_am68x_r5_defconfig +F: doc/board/phytec/phycore-am68x.rst +F: include/configs/phycore_am68x.h diff --git a/board/phytec/phycore_am68x/Makefile b/board/phytec/phycore_am68x/Makefile new file mode 100644 index 00000000000..a2e141269ef --- /dev/null +++ b/board/phytec/phycore_am68x/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR MIT +# +# Copyright (C) 2025 PHYTEC Messtechnik GmbH +# Author: Dominik Haller <[email protected]> + +obj-y += phycore-am68x.o diff --git a/board/phytec/phycore_am68x/board-cfg.yaml b/board/phytec/phycore_am68x/board-cfg.yaml new file mode 100644 index 00000000000..94e61ab1dc6 --- /dev/null +++ b/board/phytec/phycore_am68x/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J721S2 +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 diff --git a/board/phytec/phycore_am68x/phycore-am68x.c b/board/phytec/phycore_am68x/phycore-am68x.c new file mode 100644 index 00000000000..312d7ece23e --- /dev/null +++ b/board/phytec/phycore_am68x/phycore-am68x.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Dominik Haller <[email protected]> + * + * https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/ + */ + +#include <env.h> +#include <fdt_support.h> +#include <generic-phy.h> +#include <image.h> +#include <init.h> +#include <log.h> +#include <net.h> +#include <asm/arch/hardware.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <spl.h> +#include <dm.h> +#include <dm/uclass-internal.h> +#include <dm/root.h> +#include <asm/arch/k3-ddr.h> + +DECLARE_GLOBAL_DATA_PTR; + +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) +{ +#ifdef CONFIG_PHYS_64BIT + /* Limit RAM used by U-Boot to the DDR low region */ + if (gd->ram_top > 0x100000000) + return 0x100000000; +#endif + + return gd->ram_top; +} + +int dram_init(void) +{ + s32 ret; + + ret = fdtdec_setup_mem_size_base_lowest(); + if (ret) + printf("Error setting up mem size and base. %d\n", ret); + + return ret; +} + +int dram_init_banksize(void) +{ + s32 ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + printf("Error setting up memory banksize. %d\n", ret); + + return ret; +} + +#if defined(CONFIG_XPL_BUILD) +void spl_perform_board_fixups(struct spl_image_info *spl_image) +{ + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } +} +#endif + +void spl_board_init(void) +{ + struct udevice *dev; + int ret; + + if (IS_ENABLED(CONFIG_ESM_K3)) { + const char * const esms[] = {"esm@700000", "esm@40800000", "esm@42080000"}; + + for (int i = 0; i < ARRAY_SIZE(esms); ++i) { + ret = uclass_get_device_by_name(UCLASS_MISC, esms[i], + &dev); + if (ret) { + printf("MISC init for %s failed: %d\n", esms[i], ret); + break; + } + } + } + + if (IS_ENABLED(CONFIG_ESM_PMIC) && ret == 0) { + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(pmic_esm), + &dev); + if (ret) + printf("ESM PMIC init failed: %d\n", ret); + } +} diff --git a/board/phytec/phycore_am68x/phycore_am68x.env b/board/phytec/phycore_am68x/phycore_am68x.env new file mode 100644 index 00000000000..4908055b542 --- /dev/null +++ b/board/phytec/phycore_am68x/phycore_am68x.env @@ -0,0 +1,22 @@ +fdtaddr=0x88000000 +loadaddr=0x82000000 +scriptaddr=0x89100000 +fdt_addr_r=0x88000000 +kernel_addr_r=0x82000000 +ramdisk_addr_r=0x88080000 +fdtoverlay_addr_r=0x89000000 +fit_addr_r=0x90000000 + +fdtfile=CONFIG_DEFAULT_FDT_FILE +mmcdev=1 +mmcroot=2 +mmcpart=1 +console=ttyS2,115200n8 +earlycon=ns16550a,mmio32,0x02880000 + +spi_fdt_addr=0x700000 +spi_image_addr=0x800000 +spi_ramdisk_addr=0x2200000 + +bootmeths=script efi extlinux pxe +boot_targets=mmc1 mmc0 spi_flash dhcp diff --git a/board/phytec/phycore_am68x/pm-cfg.yaml b/board/phytec/phycore_am68x/pm-cfg.yaml new file mode 100644 index 00000000000..e6496512b6b --- /dev/null +++ b/board/phytec/phycore_am68x/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J721S2 +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 diff --git a/board/phytec/phycore_am68x/rm-cfg.yaml b/board/phytec/phycore_am68x/rm-cfg.yaml new file mode 100644 index 00000000000..8796463129d --- /dev/null +++ b/board/phytec/phycore_am68x/rm-cfg.yaml @@ -0,0 +1,2523 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J721S2 +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - # 1 + host_id: 3 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 2 + host_id: 5 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 3 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 4 + host_id: 13 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 5 + host_id: 21 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 6 + host_id: 23 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 7 + host_id: 35 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 8 + host_id: 37 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 9 + host_id: 40 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 10 + host_id: 42 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 31 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 32 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + resasg: + subhdr: + magic: 0x7B25 + size: 8 + resasg_entries_size: 3032 + reserved: 0 + resasg_entries: + - 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+ start_resource: 16790 + num_resource: 128 + type: 17613 + host_id: 35 + reserved: 0 + - + start_resource: 16918 + num_resource: 128 + type: 17613 + host_id: 37 + reserved: 0 + - + start_resource: 17046 + num_resource: 128 + type: 17613 + host_id: 40 + reserved: 0 + - + start_resource: 17174 + num_resource: 128 + type: 17613 + host_id: 42 + reserved: 0 + - + start_resource: 17302 + num_resource: 256 + type: 17613 + host_id: 3 + reserved: 0 + - + start_resource: 17558 + num_resource: 64 + type: 17613 + host_id: 5 + reserved: 0 + - + start_resource: 17622 + num_resource: 298 + type: 17613 + host_id: 128 + reserved: 0 diff --git a/board/phytec/phycore_am68x/sec-cfg.yaml b/board/phytec/phycore_am68x/sec-cfg.yaml new file mode 100644 index 00000000000..02029918613 --- /dev/null +++ b/board/phytec/phycore_am68x/sec-cfg.yaml @@ -0,0 +1,379 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for J721S2 +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - # 1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - # 32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - # 1 + host_id: 0 + supervisor_host_id: 0 + - # 2 + host_id: 0 + supervisor_host_id: 0 + - # 3 + host_id: 0 + supervisor_host_id: 0 + - # 4 + host_id: 0 + supervisor_host_id: 0 + - # 5 + host_id: 0 + supervisor_host_id: 0 + - # 6 + host_id: 0 + supervisor_host_id: 0 + - # 7 + host_id: 0 + supervisor_host_id: 0 + - # 8 + host_id: 0 + supervisor_host_id: 0 + - # 9 + host_id: 0 + supervisor_host_id: 0 + - # 10 + host_id: 0 + supervisor_host_id: 0 + - # 11 + host_id: 0 + supervisor_host_id: 0 + - # 12 + host_id: 0 + supervisor_host_id: 0 + - # 13 + host_id: 0 + supervisor_host_id: 0 + - # 14 + host_id: 0 + supervisor_host_id: 0 + - # 15 + host_id: 0 + supervisor_host_id: 0 + - # 16 + host_id: 0 + supervisor_host_id: 0 + - # 17 + host_id: 0 + supervisor_host_id: 0 + - # 18 + host_id: 0 + supervisor_host_id: 0 + - # 19 + host_id: 0 + supervisor_host_id: 0 + - # 20 + host_id: 0 + supervisor_host_id: 0 + - # 21 + host_id: 0 + supervisor_host_id: 0 + - # 22 + host_id: 0 + supervisor_host_id: 0 + - # 23 + host_id: 0 + supervisor_host_id: 0 + - # 24 + host_id: 0 + supervisor_host_id: 0 + - # 25 + host_id: 0 + supervisor_host_id: 0 + - # 26 + host_id: 0 + supervisor_host_id: 0 + - # 27 + host_id: 0 + supervisor_host_id: 0 + - # 28 + host_id: 0 + supervisor_host_id: 0 + - # 29 + host_id: 0 + supervisor_host_id: 0 + - # 30 + host_id: 0 + supervisor_host_id: 0 + - # 31 + host_id: 0 + supervisor_host_id: 0 + - # 32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + otp_entry: + - # 1 + host_id: 0 + host_perms: 0 + - # 2 + host_id: 0 + host_perms: 0 + - # 3 + host_id: 0 + host_perms: 0 + - # 4 + host_id: 0 + host_perms: 0 + - # 5 + host_id: 0 + host_perms: 0 + - # 6 + host_id: 0 + host_perms: 0 + - # 7 + host_id: 0 + host_perms: 0 + - # 8 + host_id: 0 + host_perms: 0 + - # 9 + host_id: 0 + host_perms: 0 + - # 10 + host_id: 0 + host_perms: 0 + - # 11 + host_id: 0 + host_perms: 0 + - # 12 + host_id: 0 + host_perms: 0 + - # 13 + host_id: 0 + host_perms: 0 + - # 14 + host_id: 0 + host_perms: 0 + - # 15 + host_id: 0 + host_perms: 0 + - # 16 + host_id: 0 + host_perms: 0 + - # 17 + host_id: 0 + host_perms: 0 + - # 18 + host_id: 0 + host_perms: 0 + - # 19 + host_id: 0 + host_perms: 0 + - # 20 + host_id: 0 + host_perms: 0 + - # 21 + host_id: 0 + host_perms: 0 + - # 22 + host_id: 0 + host_perms: 0 + - # 23 + host_id: 0 + host_perms: 0 + - # 24 + host_id: 0 + host_perms: 0 + - # 25 + host_id: 0 + host_perms: 0 + - # 26 + host_id: 0 + host_perms: 0 + - # 27 + host_id: 0 + host_perms: 0 + - # 28 + host_id: 0 + host_perms: 0 + - # 29 + host_id: 0 + host_perms: 0 + - # 30 + host_id: 0 + host_perms: 0 + - # 31 + host_id: 0 + host_perms: 0 + - # 32 + host_id: 0 + host_perms: 0 + write_host_id: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + auth_resource_owner: 0 + enable_saul_psil_global_config_writes: 0 + rsvd: [0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x0 + allow_wildcard_unlock: 0x0 + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] |