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authorPeng Fan <[email protected]>2026-03-30 22:04:03 +0800
committerFabio Estevam <[email protected]>2026-04-02 09:11:33 -0300
commitd515edf2ad0ebdce8c8a98b1753dda923ebca00d (patch)
tree5d039d23243d739490195677cb61b07ca9d7160c /board/phytec
parentbf7dbb75fe4cf16e71e387321910f91095fa7a0b (diff)
imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC handling. Changes include: - Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig. - Drop legacy SPL I2C and PMIC options. - Remove manual I2C1 pad setup and legacy power_pca9450_init() usage. - Use DM-based pmic_get() with the DT node "pmic@25". - Update PMIC register programming to use struct udevice API. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Yannic Moog <[email protected]> Tested-by: Yannic Moog <[email protected]> Reviewed-by: Teresa Remmet <[email protected]>
Diffstat (limited to 'board/phytec')
-rw-r--r--board/phytec/phycore_imx8mp/spl.c43
1 files changed, 14 insertions, 29 deletions
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index fc7aefd0073..fc6f5104925 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -117,45 +117,32 @@ out:
ddr_init(&dram_timing);
}
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
- .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
- .gp = IMX_GPIO_NR(5, 14),
- },
- .sda = {
- .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
- .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
- .gp = IMX_GPIO_NR(5, 15),
- },
-};
-
int power_init_board(void)
{
- struct pmic *p;
+ struct udevice *dev;
int ret;
- ret = power_pca9450_init(0, 0x25);
- if (ret)
- printf("power init failed");
- p = pmic_get("PCA9450");
- pmic_probe(p);
+ ret = pmic_get("pmic@25", &dev);
+ if (ret == -ENODEV) {
+ puts("No pmic@25\n");
+ return 0;
+ }
+ if (ret < 0)
+ return ret;
/* BUCKxOUT_DVS0/1 control BUCK123 output */
- pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
- pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
- pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
/* Set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
+ pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
return 0;
}
@@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
enable_tzc380();
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
power_init_board();
/* DDR initialization */