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authorLeonard Anderweit <[email protected]>2025-01-17 14:20:13 +0100
committerFabio Estevam <[email protected]>2025-01-20 08:41:38 -0300
commite38a490810af76169f7cf1d298966ea9ba3c005b (patch)
tree0685cd4bae156eba7f0e864423905e4b6df9ac38 /board/phytec
parentbb060231b65f9c1a54ff981fb08073e23829cf44 (diff)
phycore-imx8mp: Enable CAAM in spl
Enable CAAM in spl. Signed-off-by: Leonard Anderweit <[email protected]>
Diffstat (limited to 'board/phytec')
-rw-r--r--board/phytec/phycore_imx8mp/spl.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index 0610d8bbd0b..cb8e450b995 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -165,6 +165,8 @@ int power_init_board(void)
void spl_board_init(void)
{
+ arch_misc_init();
+
/* Set GIC clock to 500Mhz for OD VDD_SOC. */
clock_enable(CCGR_GIC, 0);
clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));