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| author | Tom Rini <[email protected]> | 2021-07-24 16:38:09 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-07-24 16:39:36 -0400 |
| commit | 7d4ce5ea53bdf4be8a951154c65ceef4b389fea7 (patch) | |
| tree | e84e326d3b8553b10bc3e6b9df655a8b17d06429 /board/socionext/developerbox/developerbox.c | |
| parent | edecc15eb9593b94dcd6a5f4f5ea5f134125b6a0 (diff) | |
| parent | 91a043896dfb8544db00496bee08bcf59e449dc9 (diff) | |
Merge branch '2021-07-24-arm-and-platform-updates'
- dragonboard410c, synquacer, aspeed fixes / updates
- pl011 serial driver fixes
- Two generic arm bugfixes
Diffstat (limited to 'board/socionext/developerbox/developerbox.c')
| -rw-r--r-- | board/socionext/developerbox/developerbox.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 34335baec36..9552bfcdc3b 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -62,6 +62,19 @@ DECLARE_GLOBAL_DATA_PTR; #define LOAD_OFFSET 0x100 +/* SCBM System MMU is used for eMMC and NETSEC */ +#define SCBM_SMMU_ADDR (0x52e00000UL) +#define SMMU_SCR0_OFFS (0x0) +#define SMMU_SCR0_SHCFG_INNER (0x2 << 22) +#define SMMU_SCR0_MTCFG (0x1 << 20) +#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16) + +static void synquacer_setup_scbm_smmu(void) +{ + writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB, + SCBM_SMMU_ADDR + SMMU_SCR0_OFFS); +} + /* * Miscellaneous platform dependent initialisations */ @@ -71,6 +84,8 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; + synquacer_setup_scbm_smmu(); + return 0; } |