diff options
| author | Tom Rini <[email protected]> | 2020-05-14 08:44:06 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2020-05-14 08:44:06 -0400 |
| commit | e2b86e23cebc9dfaca2e7b7e53b10fa27d09f4e9 (patch) | |
| tree | 0e8b20ee7e4b9426913dc905392386c1c28ee0f2 /board/st/common | |
| parent | fe16786149c8f1b2db95ed614a760bc443da6472 (diff) | |
| parent | 1b28a5e2b00a9bf3523cc63694baa03f23604619 (diff) | |
Merge tag 'u-boot-stm32-20200514' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- stm32mp1: migrate MTD and DFU configuration in Kconfig
- stm32mp1: add command stm32prog
- stm32mp1: several board and arch updates
- stm32mp1: activate data cache in SPL and before relocation
- Many improvment for AV96 board and DHCOR SoM
(add new defconfig, DDR3 coding on DHCOR SoM, split between board and SOM
Synchronize DDR setttings on DH SoMs, setting for I2C EEPROM)
- clk: stm32mp1: fix CK_MPU calculation
- DT alignment of stm32mp1 device tree with Linux 5.7-rc2
Diffstat (limited to 'board/st/common')
| -rw-r--r-- | board/st/common/Kconfig | 64 | ||||
| -rw-r--r-- | board/st/common/Makefile | 5 | ||||
| -rw-r--r-- | board/st/common/stm32mp_dfu.c | 245 | ||||
| -rw-r--r-- | board/st/common/stm32mp_mtdparts.c | 167 |
4 files changed, 481 insertions, 0 deletions
diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig index af01ca4891c..015ba409396 100644 --- a/board/st/common/Kconfig +++ b/board/st/common/Kconfig @@ -5,3 +5,67 @@ config CMD_STBOARD help This compile the stboard command to read and write the board in the OTP. + +config MTDPARTS_NAND0_BOOT + string "mtd boot partitions for nand0" + default "2m(fsbl),2m(ssbl1),2m(ssbl2)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the partitions of nand0 used to build mtparts dynamically + for boot from nand0. + Each partition need to be aligned with the device erase block size, + 512KB is the max size for the NAND supported by stm32mp1 platform. + +config MTDPARTS_NAND0_TEE + string "mtd tee partitions for nand0" + default "512k(teeh),512k(teed),512k(teex)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the tee partitions added in mtparts dynamically + when tee is supported with boot from nand0. + Each partition need to be aligned with the device erase block size, + 512KB is the max size for the NAND supported by stm32mp1 platform. + +config MTDPARTS_NOR0_BOOT + string "mtd boot partitions for nor0" + default "256k(fsbl1),256k(fsbl2),2m(ssbl),512k(u-boot-env)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the partitions of nand0 used to build mtparts dynamically + for boot from nor0. + Each partition need to be aligned with the device erase block size, + with 256KB we support all the NOR. + U-Boot env partition (512kB) use 2 erase block for redundancy. + +config MTDPARTS_NOR0_TEE + string "mtd tee partitions for nor0" + default "256k(teeh),256k(teed),256k(teex)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the tee partitions added in mtparts dynamically + when tee is supported with boot from nor0. + +config MTDPARTS_SPINAND0_BOOT + string "mtd boot partitions for spi-nand0" + default "2m(fsbl),2m(ssbl1),2m(ssbl2)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the partitions of nand0 used to build mtparts dynamically + for boot from spi-nand0, + 512KB is the max size for the NAND supported by stm32mp1 platform. + +config MTDPARTS_SPINAND0_TEE + string "mtd tee partitions for spi-nand0" + default "512k(teeh),512k(teed),512k(teex)" + depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP + help + This define the tee partitions added in mtparts dynamically + when tee is supported with boot from spi-nand0, + 512KB is the max size for the NAND supported by stm32mp1 platform. + +config DFU_ALT_RAM0 + string "dfu for ram0" + default "uImage ram 0xc2000000 0x2000000;devicetree.dtb ram 0xc4000000 0x100000;uramdisk.image.gz ram 0xc4400000 0x10000000" + depends on ARCH_STM32MP && SET_DFU_ALT_INFO + help + This defines the partitions of ram used to build dfu dynamically. diff --git a/board/st/common/Makefile b/board/st/common/Makefile index 8553606b904..aa030bacd81 100644 --- a/board/st/common/Makefile +++ b/board/st/common/Makefile @@ -4,3 +4,8 @@ # obj-$(CONFIG_CMD_STBOARD) += cmd_stboard.o + +ifeq ($(CONFIG_ARCH_STM32MP),y) +obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += stm32mp_mtdparts.o +obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o +endif diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c new file mode 100644 index 00000000000..3bd005bb04a --- /dev/null +++ b/board/st/common/stm32mp_dfu.c @@ -0,0 +1,245 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <blk.h> +#include <dfu.h> +#include <env.h> +#include <memalign.h> +#include <misc.h> +#include <mtd.h> +#include <mtd_node.h> +#include <asm/arch/stm32prog.h> + +#define DFU_ALT_BUF_LEN SZ_1K + +static void board_get_alt_info_mmc(struct udevice *dev, char *buf) +{ + disk_partition_t info; + int p, len, devnum; + bool first = true; + const char *name; + struct mmc *mmc; + struct blk_desc *desc; + + mmc = mmc_get_mmc_dev(dev); + if (!mmc) + return; + + if (mmc_init(mmc)) + return; + + desc = mmc_get_blk_desc(mmc); + if (!desc) + return; + + name = blk_get_if_type_name(desc->if_type); + devnum = desc->devnum; + len = strlen(buf); + + if (buf[0] != '\0') + len += snprintf(buf + len, + DFU_ALT_BUF_LEN - len, "&"); + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s %d=", name, devnum); + + if (IS_MMC(mmc) && mmc->capacity_boot) { + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_boot1 raw 0x0 0x%llx mmcpart 1;", + name, devnum, mmc->capacity_boot); + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_boot2 raw 0x0 0x%llx mmcpart 2", + name, devnum, mmc->capacity_boot); + first = false; + } + + for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + if (!first) + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";"); + first = false; + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_%s part %d %d", + name, devnum, info.name, devnum, p); + } +} + +static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf) +{ + struct mtd_info *part; + bool first = true; + const char *name; + int len, partnum = 0; + + name = mtd->name; + len = strlen(buf); + + if (buf[0] != '\0') + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, "&"); + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "mtd %s=", name); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s raw 0x0 0x%llx ", + name, mtd->size); + + list_for_each_entry(part, &mtd->partitions, node) { + partnum++; + if (!first) + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";"); + first = false; + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s_%s part %d", + name, part->name, partnum); + } +} + +void set_dfu_alt_info(char *interface, char *devstr) +{ + struct udevice *dev; + struct mtd_info *mtd; + + ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); + + if (env_get("dfu_alt_info")) + return; + + memset(buf, 0, sizeof(buf)); + + snprintf(buf, DFU_ALT_BUF_LEN, + "ram 0=%s", CONFIG_DFU_ALT_RAM0); + + if (!uclass_get_device(UCLASS_MMC, 0, &dev)) + board_get_alt_info_mmc(dev, buf); + + if (!uclass_get_device(UCLASS_MMC, 1, &dev)) + board_get_alt_info_mmc(dev, buf); + + if (CONFIG_IS_ENABLED(MTD)) { + /* probe all MTD devices */ + mtd_probe_devices(); + + /* probe SPI flash device on a bus */ + if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) { + mtd = get_mtd_device_nm("nor0"); + if (!IS_ERR_OR_NULL(mtd)) + board_get_alt_info_mtd(mtd, buf); + } + + mtd = get_mtd_device_nm("nand0"); + if (!IS_ERR_OR_NULL(mtd)) + board_get_alt_info_mtd(mtd, buf); + + mtd = get_mtd_device_nm("spi-nand0"); + if (!IS_ERR_OR_NULL(mtd)) + board_get_alt_info_mtd(mtd, buf); + } + +#ifdef CONFIG_DFU_VIRT + strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN); + + if (IS_ENABLED(CONFIG_PMIC_STPMIC1)) + strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN); +#endif + + env_set("dfu_alt_info", buf); + puts("DFU alt info setting: done\n"); +} + +#if CONFIG_IS_ENABLED(DFU_VIRT) +#include <dfu.h> +#include <power/stpmic1.h> + +static int dfu_otp_read(u64 offset, u8 *buffer, long *size) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size); + if (ret >= 0) { + *size = ret; + ret = 0; + } + + return 0; +} + +static int dfu_pmic_read(u64 offset, u8 *buffer, long *size) +{ + int ret; +#ifdef CONFIG_PMIC_STPMIC1 + struct udevice *dev; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, 0xF8 + offset, buffer, *size); + if (ret >= 0) { + *size = ret; + ret = 0; + } + if (ret == -EACCES) { + *size = 0; + ret = 0; + } +#else + pr_err("PMIC update not supported"); + ret = -EOPNOTSUPP; +#endif + + return ret; +} + +int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset, + void *buf, long *len) +{ + switch (dfu->data.virt.dev_num) { + case 0x0: + return dfu_otp_read(offset, buf, len); + case 0x1: + return dfu_pmic_read(offset, buf, len); + } + + if (CONFIG_IS_ENABLED(CMD_STM32PROG) && + dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM) + return stm32prog_read_medium_virt(dfu, offset, buf, len); + + *len = 0; + return 0; +} + +int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset, + void *buf, long *len) +{ + if (CONFIG_IS_ENABLED(CMD_STM32PROG) && + dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM) + return stm32prog_write_medium_virt(dfu, offset, buf, len); + + return -EOPNOTSUPP; +} + +int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size) +{ + if (CONFIG_IS_ENABLED(CMD_STM32PROG) && + dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM) + return stm32prog_get_medium_size_virt(dfu, size); + + *size = SZ_1K; + + return 0; +} + +#endif diff --git a/board/st/common/stm32mp_mtdparts.c b/board/st/common/stm32mp_mtdparts.c new file mode 100644 index 00000000000..9f5897f8c86 --- /dev/null +++ b/board/st/common/stm32mp_mtdparts.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2020, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <dfu.h> +#include <dm.h> +#include <env.h> +#include <env_internal.h> +#include <mtd.h> +#include <mtd_node.h> +#include <tee.h> +#include <asm/arch/stm32prog.h> +#include <asm/arch/sys_proto.h> + +#define MTDPARTS_LEN 256 +#define MTDIDS_LEN 128 + +/* + * Get a global data pointer + */ +DECLARE_GLOBAL_DATA_PTR; + +/** + * update the variables "mtdids" and "mtdparts" with boot, tee and user strings + */ +static void board_set_mtdparts(const char *dev, + char *mtdids, + char *mtdparts, + const char *boot, + const char *tee, + const char *user) +{ + /* mtdids: "<dev>=<dev>, ...." */ + if (mtdids[0] != '\0') + strcat(mtdids, ","); + strcat(mtdids, dev); + strcat(mtdids, "="); + strcat(mtdids, dev); + + /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */ + if (mtdparts[0] != '\0') + strncat(mtdparts, ";", MTDPARTS_LEN); + else + strcat(mtdparts, "mtdparts="); + + strncat(mtdparts, dev, MTDPARTS_LEN); + strncat(mtdparts, ":", MTDPARTS_LEN); + + if (boot) { + strncat(mtdparts, boot, MTDPARTS_LEN); + strncat(mtdparts, ",", MTDPARTS_LEN); + } + + if (tee) { + strncat(mtdparts, tee, MTDPARTS_LEN); + strncat(mtdparts, ",", MTDPARTS_LEN); + } + + strncat(mtdparts, user, MTDPARTS_LEN); +} + +void board_mtdparts_default(const char **mtdids, const char **mtdparts) +{ + struct mtd_info *mtd; + struct udevice *dev; + static char parts[3 * MTDPARTS_LEN + 1]; + static char ids[MTDIDS_LEN + 1]; + static bool mtd_initialized; + bool tee, nor, nand, spinand, serial; + + if (mtd_initialized) { + *mtdids = ids; + *mtdparts = parts; + return; + } + + tee = false; + nor = false; + nand = false; + spinand = false; + serial = false; + + switch (get_bootmode() & TAMP_BOOT_DEVICE_MASK) { + case BOOT_SERIAL_UART: + case BOOT_SERIAL_USB: + serial = true; + if (CONFIG_IS_ENABLED(CMD_STM32PROG)) { + tee = stm32prog_get_tee_partitions(); + nor = stm32prog_get_fsbl_nor(); + } + nand = true; + spinand = true; + break; + case BOOT_FLASH_NAND: + nand = true; + break; + case BOOT_FLASH_SPINAND: + spinand = true; + break; + case BOOT_FLASH_NOR: + nor = true; + break; + default: + break; + } + + if (!serial && CONFIG_IS_ENABLED(OPTEE) && + tee_find_device(NULL, NULL, NULL, NULL)) + tee = true; + + memset(parts, 0, sizeof(parts)); + memset(ids, 0, sizeof(ids)); + + /* probe all MTD devices */ + for (uclass_first_device(UCLASS_MTD, &dev); + dev; + uclass_next_device(&dev)) { + pr_debug("mtd device = %s\n", dev->name); + } + + if (nor || nand) { + mtd = get_mtd_device_nm("nand0"); + if (!IS_ERR_OR_NULL(mtd)) { + const char *mtd_boot = CONFIG_MTDPARTS_NAND0_BOOT; + const char *mtd_tee = CONFIG_MTDPARTS_NAND0_TEE; + + board_set_mtdparts("nand0", ids, parts, + !nor ? mtd_boot : NULL, + !nor && tee ? mtd_tee : NULL, + "-(UBI)"); + put_mtd_device(mtd); + } + } + + if (nor || spinand) { + mtd = get_mtd_device_nm("spi-nand0"); + if (!IS_ERR_OR_NULL(mtd)) { + const char *mtd_boot = CONFIG_MTDPARTS_SPINAND0_BOOT; + const char *mtd_tee = CONFIG_MTDPARTS_SPINAND0_TEE; + + board_set_mtdparts("spi-nand0", ids, parts, + !nor ? mtd_boot : NULL, + !nor && tee ? mtd_tee : NULL, + "-(UBI)"); + put_mtd_device(mtd); + } + } + + if (nor) { + if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) { + const char *mtd_boot = CONFIG_MTDPARTS_NOR0_BOOT; + const char *mtd_tee = CONFIG_MTDPARTS_NOR0_TEE; + + board_set_mtdparts("nor0", ids, parts, + mtd_boot, + tee ? mtd_tee : NULL, + "-(nor_user)"); + } + } + + mtd_initialized = true; + *mtdids = ids; + *mtdparts = parts; + debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts); +} |
