Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- Misc turris_omnia/mox related Fixes and impovements (Pali)
- Turris Omnia: Add support for configuring mSATA and WWAN slots
  via env variables (Pali)
- net: mvgbe: Set PHY page 0 before phy_connect (Tony)
- kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver (Tony)
- mvebu: turris_omnia: Fix SYS_RSTOUT_* macro names (Pali)
- mvebu: clearfog_defconfig: enable setexpr command (Josef)
- mvebu: x530: set MPP55 to gpio (Chris)

4 files changed, 189 insertions, 193 deletions

diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index da2fee578c4..b169abca095 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -41,8 +41,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define OMNIA_I2C_EEPROM_CHIP_LEN	2
 #define OMNIA_I2C_EEPROM_MAGIC		0x0341a034
 
-#define SYS_RSTOUT_MASK			MVEBU_REGISTER(0x18260)
-#define   SYS_RSTOUT_MASK_WD		BIT(10)
+#define A385_SYS_RSTOUT_MASK		MVEBU_REGISTER(0x18260)
+#define   A385_SYS_RSTOUT_MASK_WD	BIT(10)
 
 #define A385_WDT_GLOBAL_CTRL		MVEBU_REGISTER(0x20300)
 #define   A385_WDT_GLOBAL_RATIO_MASK	GENMASK(18, 16)
@@ -86,7 +86,7 @@ enum status_word_bits {
 #define OMNIA_GPP_POL_LOW	0x0
 #define OMNIA_GPP_POL_MID	0x0
 
-static struct serdes_map board_serdes_map_pex[] = {
+static struct serdes_map board_serdes_map[] = {
 	{PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
 	{USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
 	{PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
@@ -95,15 +95,6 @@ static struct serdes_map board_serdes_map_pex[] = {
 	{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}
 };
 
-static struct serdes_map board_serdes_map_sata[] = {
-	{SATA0, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0},
-	{USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
-	{PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
-	{USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0},
-	{PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0},
-	{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}
-};
-
 static struct udevice *omnia_get_i2c_chip(const char *name, uint addr,
 					  uint offset_len)
 {
@@ -189,7 +180,7 @@ static void enable_a385_watchdog(unsigned int timeout_minutes)
 	setbits_32(A385_WD_RSTOUT_UNMASK, A385_WD_RSTOUT_UNMASK_GLOBAL);
 
 	/* Unmask reset for watchdog */
-	clrbits_32(SYS_RSTOUT_MASK, SYS_RSTOUT_MASK_WD);
+	clrbits_32(A385_SYS_RSTOUT_MASK, A385_SYS_RSTOUT_MASK_WD);
 }
 
 static bool disable_mcu_watchdog(void)
@@ -209,13 +200,25 @@ static bool disable_mcu_watchdog(void)
 	return true;
 }
 
-static bool omnia_detect_sata(void)
+static bool omnia_detect_sata(const char *msata_slot)
 {
 	int ret;
 	u16 stsword;
 
 	puts("MiniPCIe/mSATA card detection... ");
 
+	if (msata_slot) {
+		if (strcmp(msata_slot, "pcie") == 0) {
+			puts("forced to MiniPCIe via env\n");
+			return false;
+		} else if (strcmp(msata_slot, "sata") == 0) {
+			puts("forced to mSATA via env\n");
+			return true;
+		} else if (strcmp(msata_slot, "auto") != 0) {
+			printf("unsupported env value '%s', fallback to... ", msata_slot);
+		}
+	}
+
 	ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
 	if (ret) {
 		printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe card\n",
@@ -236,16 +239,69 @@ static bool omnia_detect_sata(void)
 	return stsword & MSATA_IND_STSBIT ? true : false;
 }
 
+static bool omnia_detect_wwan_usb3(const char *wwan_slot)
+{
+	puts("WWAN slot configuration... ");
+
+	if (wwan_slot && strcmp(wwan_slot, "usb3") == 0) {
+		puts("USB3.0\n");
+		return true;
+	}
+
+	if (wwan_slot && strcmp(wwan_slot, "pcie") != 0)
+		printf("unsupported env value '%s', fallback to... ", wwan_slot);
+
+	puts("PCIe+USB2.0\n");
+	return false;
+}
+
+void *env_sf_get_env_addr(void)
+{
+	/* SPI Flash is mapped to address 0xD4000000 only in SPL */
+#ifdef CONFIG_SPL_BUILD
+	return (void *)0xD4000000 + CONFIG_ENV_OFFSET;
+#else
+	return NULL;
+#endif
+}
+
 int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
 {
-	if (omnia_detect_sata()) {
-		*serdes_map_array = board_serdes_map_sata;
-		*count = ARRAY_SIZE(board_serdes_map_sata);
-	} else {
-		*serdes_map_array = board_serdes_map_pex;
-		*count = ARRAY_SIZE(board_serdes_map_pex);
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	/* Do not use env_load() as malloc() pool is too small at this stage */
+	bool has_env = (env_init() == 0);
+#endif
+	const char *env_value = NULL;
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	/* beware that env_get() returns static allocated memory */
+	env_value = has_env ? env_get("omnia_msata_slot") : NULL;
+#endif
+
+	if (omnia_detect_sata(env_value)) {
+		/* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */
+		board_serdes_map[0].serdes_type = SATA0;
+		board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS;
+		board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE;
+	}
+
+#ifdef CONFIG_SPL_ENV_SUPPORT
+	/* beware that env_get() returns static allocated memory */
+	env_value = has_env ? env_get("omnia_wwan_slot") : NULL;
+#endif
+
+	if (omnia_detect_wwan_usb3(env_value)) {
+		/* Disable SerDes for USB 3.0 pins on the front USB-A port */
+		board_serdes_map[1].serdes_type = DEFAULT_SERDES;
+		/* Change SerDes for third mPCIe port (WWAN) from PCIe to USB 3.0 */
+		board_serdes_map[4].serdes_type = USB3_HOST0;
+		board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS;
+		board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE;
 	}
 
+	*serdes_map_array = board_serdes_map;
+	*count = ARRAY_SIZE(board_serdes_map);
+
 	return 0;
 }
 
@@ -425,7 +481,7 @@ static void handle_reset_button(void)
 		/* Ensure bootcmd_rescue is used by distroboot */
 		env_set("boot_targets", "rescue");
 
-		printf("RESET button was pressed, overwriting bootcmd!\n");
+		printf("RESET button was pressed, overwriting boot_targets!\n");
 	} else {
 		/*
 		 * In case the user somehow managed to save environment with
@@ -485,11 +541,58 @@ void spl_board_init(void)
 
 #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP)
 
-static void fixup_serdes_0_nodes(void *blob)
+static void disable_sata_node(void *blob)
 {
-	bool mode_sata;
 	int node;
 
+	fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-380-ahci") {
+		if (!fdtdec_get_is_enabled(blob, node))
+			continue;
+
+		if (fdt_status_disabled(blob, node) < 0)
+			printf("Cannot disable SATA DT node!\n");
+		else
+			debug("Disabled SATA DT node\n");
+
+		return;
+	}
+
+	printf("Cannot find SATA DT node!\n");
+}
+
+static void disable_pcie_node(void *blob, int port)
+{
+	int node;
+
+	fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-370-pcie") {
+		int port_node;
+
+		if (!fdtdec_get_is_enabled(blob, node))
+			continue;
+
+		fdt_for_each_subnode (port_node, blob, node) {
+			if (!fdtdec_get_is_enabled(blob, port_node))
+				continue;
+
+			if (fdtdec_get_int(blob, port_node, "marvell,pcie-port", -1) != port)
+				continue;
+
+			if (fdt_status_disabled(blob, port_node) < 0)
+				printf("Cannot disable PCIe port %d DT node!\n", port);
+			else
+				debug("Disabled PCIe port %d DT node\n", port);
+
+			return;
+		}
+	}
+
+	printf("Cannot find PCIe port %d DT node!\n", port);
+}
+
+static void fixup_msata_port_nodes(void *blob)
+{
+	bool mode_sata;
+
 	/*
 	 * Determine if SerDes 0 is configured to SATA mode.
 	 * We do this instead of calling omnia_detect_sata() to avoid another
@@ -508,48 +611,38 @@ static void fixup_serdes_0_nodes(void *blob)
 		return;
 	}
 
-	/* If mSATA card is not present, disable SATA DT node */
 	if (!mode_sata) {
-		fdt_for_each_node_by_compatible(node, blob, -1,
-						"marvell,armada-380-ahci") {
-			if (!fdtdec_get_is_enabled(blob, node))
-				continue;
-
-			if (fdt_status_disabled(blob, node) < 0)
-				printf("Cannot disable SATA DT node!\n");
-			else
-				debug("Disabled SATA DT node\n");
-
-			break;
-		}
-
-		return;
+		/* If mSATA card is not present, disable SATA DT node */
+		disable_sata_node(blob);
+	} else {
+		/* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */
+		disable_pcie_node(blob, 0);
 	}
+}
 
-	/* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */
-	fdt_for_each_node_by_compatible(node, blob, -1,
-					"marvell,armada-370-pcie") {
-		int port;
-
-		if (!fdtdec_get_is_enabled(blob, node))
-			continue;
-
-		fdt_for_each_subnode (port, blob, node) {
-			if (!fdtdec_get_is_enabled(blob, port))
-				continue;
+static void fixup_wwan_port_nodes(void *blob)
+{
+	bool mode_usb3;
 
-			if (fdtdec_get_int(blob, port, "marvell,pcie-port",
-					   -1) != 0)
-				continue;
+	/* Determine if SerDes 4 is configured to USB3 mode */
+	mode_usb3 = ((readl(MVEBU_REGISTER(0x183fc)) & GENMASK(19, 16)) >> 16) == 4;
 
-			if (fdt_status_disabled(blob, port) < 0)
-				printf("Cannot disable PCIe port 0 DT node!\n");
-			else
-				debug("Disabled PCIe port 0 DT node\n");
+	/* If SerDes 4 is not configured to USB3 mode then nothing is needed to fixup */
+	if (!mode_usb3)
+		return;
 
-			return;
-		}
+	/*
+	 * We're either adding status = "disabled" property, or changing
+	 * status = "okay" to status = "disabled". In both cases we'll need more
+	 * space. Increase the size a little.
+	 */
+	if (fdt_increase_size(blob, 32) < 0) {
+		printf("Cannot increase FDT size!\n");
+		return;
 	}
+
+	/* Disable PCIe port 2 DT node (WWAN) */
+	disable_pcie_node(blob, 2);
 }
 
 #endif
@@ -557,7 +650,8 @@ static void fixup_serdes_0_nodes(void *blob)
 #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
 int board_fix_fdt(void *blob)
 {
-	fixup_serdes_0_nodes(blob);
+	fixup_msata_port_nodes(blob);
+	fixup_wwan_port_nodes(blob);
 
 	return 0;
 }
@@ -702,7 +796,8 @@ fail:
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
 	fixup_spi_nor_partitions(blob);
-	fixup_serdes_0_nodes(blob);
+	fixup_msata_port_nodes(blob);
+	fixup_wwan_port_nodes(blob);
 
 	return 0;
 }
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index c0ec2afa301..cbf4533e78d 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -93,7 +93,7 @@ int board_early_init_f(void)
 	writel(0x55550550, MVEBU_MPP_BASE + 0x0c);
 	writel(0x55555555, MVEBU_MPP_BASE + 0x10);
 	writel(0x00100565, MVEBU_MPP_BASE + 0x14);
-	writel(0x40000000, MVEBU_MPP_BASE + 0x18);
+	writel(0x00000000, MVEBU_MPP_BASE + 0x18);
 	writel(0x00004444, MVEBU_MPP_BASE + 0x1c);
 
 	return 0;
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index b71de4e11f0..b3ea6608914 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,22 +1,49 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2015, 2021 Tony Dinh <[email protected]>
+ * Copyright (C) 2015, 2021-2022 Tony Dinh <[email protected]>
  * Copyright (C) 2015 Gerald Kerma <[email protected]>
  */
 
 #include <common.h>
 #include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
-#include "nsa310s.h"
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * low GPIO's
+ */
+#define HDD1_GREEN_LED		BIT(16)
+#define HDD1_RED_LED		BIT(13)
+#define USB_GREEN_LED		BIT(15)
+#define USB_POWER		BIT(21)
+#define SYS_GREEN_LED		BIT(28)
+#define SYS_ORANGE_LED		BIT(29)
+
+#define COPY_GREEN_LED		BIT(22)
+#define COPY_RED_LED		BIT(23)
+
+#define PIN_USB_GREEN_LED	15
+#define PIN_USB_POWER		21
+
+#define NSA310S_OE_LOW		(~(0))
+#define NSA310S_VAL_LOW		(SYS_GREEN_LED | USB_POWER)
+
+/*
+ * high GPIO's
+ */
+#define HDD2_GREEN_LED		BIT(2)
+#define HDD2_POWER		BIT(1)
+
+#define NSA310S_OE_HIGH		(~(0))
+#define NSA310S_VAL_HIGH	(HDD2_POWER)
+
 int board_early_init_f(void)
 {
 	/*
@@ -80,87 +107,7 @@ int board_init(void)
 	return 0;
 }
 
-static int fdt_get_phy_addr(const char *path)
-{
-	const void *fdt = gd->fdt_blob;
-	const u32 *reg;
-	const u32 *val;
-	int node, phandle, addr;
-
-	/* Find the node by its full path */
-	node = fdt_path_offset(fdt, path);
-	if (node >= 0) {
-		/* Look up phy-handle */
-		val = fdt_getprop(fdt, node, "phy-handle", NULL);
-		if (val) {
-			phandle = fdt32_to_cpu(*val);
-			if (!phandle)
-				return -1;
-			/* Follow it to its node */
-			node = fdt_node_offset_by_phandle(fdt, phandle);
-			if (node) {
-				/* Look up reg */
-				reg = fdt_getprop(fdt, node, "reg", NULL);
-				if (reg) {
-					addr = fdt32_to_cpu(*reg);
-					return addr;
-				}
-			}
-		}
-	}
-	return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
+int board_eth_init(struct bd_info *bis)
 {
-	u16 reg;
-	u16 phyaddr;
-	char *name = "ethernet-controller@72000";
-	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	phyaddr = fdt_get_phy_addr(eth0_path);
-	if (phyaddr < 0)
-		return;
-
-	/* set RGMII delay */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
-	miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
-	miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
-	/* reset PHY */
-	if (miiphy_reset(name, phyaddr))
-		return;
-
-	/*
-	 * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
-	 * and has an MCU attached to the LED[2] via tristate interrupt
-	 */
-
-	/* switch to LED register page */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
-	/* read out LED polarity register */
-	miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg);
-	/* clear 4, set 5 - LED2 low, tri-state */
-	reg &= ~(MV88E1318_LED2_4);
-	reg |= (MV88E1318_LED2_5);
-	/* write back LED polarity register */
-	miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
-	/* jump back to page 0, per the PHY chip documenation. */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
-	/* set PHY back to auto-negotiation mode */
-	miiphy_write(name, phyaddr, 0x4, 0x1e1);
-	miiphy_write(name, phyaddr, 0x9, 0x300);
-	/* downshift */
-	miiphy_write(name, phyaddr, 0x10, 0x3860);
-	miiphy_write(name, phyaddr, 0x0, 0x9140);
-
-	printf("MV88E1318 PHY initialized on %s\n", name);
+	return cpu_eth_init(bis);
 }
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/zyxel/nsa310s/nsa310s.h b/board/zyxel/nsa310s/nsa310s.h
deleted file mode 100644
index d8bd9a586fe..00000000000
--- a/board/zyxel/nsa310s/nsa310s.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015
- * Gerald Kerma <[email protected]>
- * Tony Dinh <[email protected]>
- */
-
-#ifndef __NSA310S_H
-#define __NSA310S_H
-
-/* low GPIO's */
-#define HDD1_GREEN_LED		(1 << 16)
-#define HDD1_RED_LED		(1 << 13)
-#define USB_GREEN_LED		(1 << 15)
-#define USB_POWER			(1 << 21)
-#define SYS_GREEN_LED		(1 << 28)
-#define SYS_ORANGE_LED		(1 << 29)
-
-#define COPY_GREEN_LED		(1 << 22)
-#define COPY_RED_LED		(1 << 23)
-
-#define PIN_USB_GREEN_LED	15
-#define PIN_USB_POWER		21
-
-#define NSA310S_OE_LOW		(~(0))
-#define NSA310S_VAL_LOW		(SYS_GREEN_LED | USB_POWER)
-
-/* high GPIO's */
-#define HDD2_GREEN_LED		(1 << 2)
-#define HDD2_POWER			(1 << 1)
-
-#define NSA310S_OE_HIGH		(~(0))
-#define NSA310S_VAL_HIGH	(HDD2_POWER)
-
-/* PHY related */
-#define MV88E1318_PGADR_REG		22
-#define MV88E1318_MAC_CTRL_PG	2
-#define MV88E1318_MAC_CTRL_REG	21
-#define MV88E1318_RGMII_TX_CTRL	(1 << 4)
-#define MV88E1318_RGMII_RX_CTRL	(1 << 5)
-#define MV88E1318_LED_PG		3
-#define MV88E1318_LED_POL_REG	17
-#define MV88E1318_LED2_4		(1 << 4)
-#define MV88E1318_LED2_5		(1 << 5)
-
-#endif /* __NSA310S_H */