rockchip: rock5b-rk3588: Add support for ROCK 5B+

Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>

3 files changed, 69 insertions, 2 deletions

diff --git a/board/radxa/rock5b-rk3588/Kconfig b/board/radxa/rock5b-rk3588/Kconfig
index 41dfe2402b1..98d63011783 100644
--- a/board/radxa/rock5b-rk3588/Kconfig
+++ b/board/radxa/rock5b-rk3588/Kconfig
@@ -9,4 +9,9 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
 	default "rock5b-rk3588"
 
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ADC
+	select SPL_ADC
+
 endif
diff --git a/board/radxa/rock5b-rk3588/MAINTAINERS b/board/radxa/rock5b-rk3588/MAINTAINERS
index 4460c9971a9..c8a43769105 100644
--- a/board/radxa/rock5b-rk3588/MAINTAINERS
+++ b/board/radxa/rock5b-rk3588/MAINTAINERS
@@ -5,5 +5,4 @@ S:	Maintained
 F:	board/radxa/rock5b-rk3588
 F:	include/configs/rock5b-rk3588.h
 F:	configs/rock5b-rk3588_defconfig
-F:	arch/arm/dts/rk3588-rock-5b.dts
-F:	arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+F:	arch/arm/dts/rk3588-rock-5b*
diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c
index fc2f69db224..6bf4497ce3a 100644
--- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c
+++ b/board/radxa/rock5b-rk3588/rock5b-rk3588.c
@@ -3,8 +3,71 @@
  * Copyright (c) 2023-2024 Collabora Ltd.
  */
 
+#include <adc.h>
+#include <env.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <asm/arch-rockchip/sdram.h>
+#include <linux/errno.h>
+
+#define PMU1GRF_BASE		0xfd58a000
+#define OS_REG2_REG		0x208
+
+#define HW_ID_CHANNEL		5
+
+struct board_model {
+	unsigned int dram;
+	unsigned int low;
+	unsigned int high;
+	const char *fdtfile;
+};
+
+static const struct board_model board_models[] = {
+	{ LPDDR5, 4005, 4185, "rockchip/rk3588-rock-5b-plus.dtb" },
+};
+
+static const struct board_model *get_board_model(void)
+{
+	unsigned int val, dram_type;
+	int i, ret;
+
+	dram_type = rockchip_sdram_type(PMU1GRF_BASE + OS_REG2_REG);
+
+	ret = adc_channel_single_shot("adc@fec10000", HW_ID_CHANNEL, &val);
+	if (ret)
+		return NULL;
+
+	for (i = 0; i < ARRAY_SIZE(board_models); i++) {
+		unsigned int dram = board_models[i].dram;
+		unsigned int min = board_models[i].low;
+		unsigned int max = board_models[i].high;
+
+		if (dram == dram_type && min <= val && val <= max)
+			return &board_models[i];
+	}
+
+	return NULL;
+}
+
+int rk_board_late_init(void)
+{
+	const struct board_model *model = get_board_model();
+
+	if (model)
+		env_set("fdtfile", model->fdtfile);
+
+	return 0;
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	const struct board_model *model = get_board_model();
+
+	if (model && !strcmp(name, model->fdtfile))
+		return 0;
+
+	return -EINVAL;
+}
 
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)