Merge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20221024
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916

- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2

34 files changed, 3252 insertions, 1231 deletions

diff --git a/board/engicam/imx8mp/Kconfig b/board/engicam/imx8mp/Kconfig
new file mode 100644
index 00000000000..ada500ec43b
--- /dev/null
+++ b/board/engicam/imx8mp/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MP_ICORE_MX8MP
+
+config SYS_BOARD
+	default "imx8mp"
+
+config SYS_VENDOR
+	default "engicam"
+
+config SYS_CONFIG_NAME
+	default "imx8mp_icore_mx8mp"
+
+config IMX_CONFIG
+	default "board/engicam/imx8mp/imximage-lpddr4.cfg"
+
+endif
diff --git a/board/engicam/imx8mp/MAINTAINERS b/board/engicam/imx8mp/MAINTAINERS
new file mode 100644
index 00000000000..a25908a76c7
--- /dev/null
+++ b/board/engicam/imx8mp/MAINTAINERS
@@ -0,0 +1,7 @@
+i.Core-MX8M-Plus-EDIMM2.2
+M:	Manoj Sai <[email protected]>
+M:	Matteo Lisi <[email protected]>
+S:	Maintained
+F:	board/engicam/imx8mp
+F:	include/configs/imx8mp_icore_mx8mp.h
+F:	configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
diff --git a/board/engicam/imx8mp/Makefile b/board/engicam/imx8mp/Makefile
new file mode 100644
index 00000000000..c3ec09d6e38
--- /dev/null
+++ b/board/engicam/imx8mp/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2020 Amarula Solutions(India)
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y += icore_mx8mp.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c
new file mode 100644
index 00000000000..b309a12df08
--- /dev/null
+++ b/board/engicam/imx8mp/icore_mx8mp.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Engicam S.r.l.
+ * Copyright (C) 2022 Amarula Solutions(India)
+ *
+ * Authors:
+ * Manoj Sai <[email protected]>
+ * Jagan Teki <[email protected]>
+ */
+
+#include <common.h>
+#include <env.h>
+#include <errno.h>
+#include <init.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <linux/delay.h>
+#include <asm/global_data.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm-generic/gpio.h>
+#include <asm/arch/imx8mp_pins.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void setup_fec(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* Enable RGMII TX clk output */
+	setbits_le32(&gpr->gpr[1], BIT(22));
+}
+
+static int setup_eqos(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* set INTF as RGMII, enable RGMII TXC clock */
+	clrsetbits_le32(&gpr->gpr[1],
+			IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));
+	setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21));
+
+	return set_clk_eqos(ENET_125MHZ);
+}
+
+#if CONFIG_IS_ENABLED(NET)
+int board_phy_config(struct phy_device *phydev)
+{
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+	if (CONFIG_IS_ENABLED(FEC_MXC))
+		setup_fec();
+
+	if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
+		setup_eqos();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	return 0;
+}
diff --git a/board/engicam/imx8mp/imximage-lpddr4.cfg b/board/engicam/imx8mp/imximage-lpddr4.cfg
new file mode 100644
index 00000000000..8aadedb1028
--- /dev/null
+++ b/board/engicam/imx8mp/imximage-lpddr4.cfg
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 NXP
+ */
+
+ROM_VERSION	v2
+BOOT_FROM	sd
+LOADER		u-boot-spl-ddr.bin	0x920000
diff --git a/board/engicam/imx8mp/lpddr4_timing.c b/board/engicam/imx8mp/lpddr4_timing.c
new file mode 100644
index 00000000000..4444180c5c2
--- /dev/null
+++ b/board/engicam/imx8mp/lpddr4_timing.c
@@ -0,0 +1,1850 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ *
+ * Align with uboot version:
+ * imx_v2019.04_5.4.x and above version
+ * For imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga:
+ * please replace #include <asm/arch/ddr.h> with #include <asm/arch/imx8m_ddr.h>
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>
+
+struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{ 0x3d400304, 0x1 },
+	{ 0x3d400030, 0x1 },
+	{ 0x3d400000, 0xa1080020 },
+	{ 0x3d400020, 0x1323 },
+	{ 0x3d400024, 0x1e84800 },
+	{ 0x3d400064, 0x7a0118 },
+	{ 0x3d400070, 0x61027f10 },
+	{ 0x3d400074, 0x7b0 },
+	{ 0x3d4000d0, 0xc00307a3 },
+	{ 0x3d4000d4, 0xc50000 },
+	{ 0x3d4000dc, 0xf4003f },
+	{ 0x3d4000e0, 0x330000 },
+	{ 0x3d4000e8, 0x660048 },
+	{ 0x3d4000ec, 0x160048 },
+	{ 0x3d400100, 0x2028222a },
+	{ 0x3d400104, 0x807bf },
+	{ 0x3d40010c, 0xe0e000 },
+	{ 0x3d400110, 0x12040a12 },
+	{ 0x3d400114, 0x2050f0f },
+	{ 0x3d400118, 0x1010009 },
+	{ 0x3d40011c, 0x501 },
+	{ 0x3d400130, 0x20800 },
+	{ 0x3d400134, 0xe100002 },
+	{ 0x3d400138, 0x120 },
+	{ 0x3d400144, 0xc80064 },
+	{ 0x3d400180, 0x3e8001e },
+	{ 0x3d400184, 0x3207a12 },
+	{ 0x3d400188, 0x0 },
+	{ 0x3d400190, 0x49f820e },
+	{ 0x3d400194, 0x80303 },
+	{ 0x3d4001b4, 0x1f0e },
+	{ 0x3d4001a0, 0xe0400018 },
+	{ 0x3d4001a4, 0xdf00e4 },
+	{ 0x3d4001a8, 0x80000000 },
+	{ 0x3d4001b0, 0x11 },
+	{ 0x3d4001c0, 0x1 },
+	{ 0x3d4001c4, 0x1 },
+	{ 0x3d4000f4, 0xc99 },
+	{ 0x3d400108, 0x9121c1c },
+	{ 0x3d400200, 0x1f },
+	{ 0x3d40020c, 0x0 },
+	{ 0x3d400210, 0x1f1f },
+	{ 0x3d400204, 0x80808 },
+	{ 0x3d400214, 0x7070707 },
+	{ 0x3d400218, 0x7070707 },
+	{ 0x3d40021c, 0xf0f },
+	{ 0x3d400250, 0x1705 },
+	{ 0x3d400254, 0x2c },
+	{ 0x3d40025c, 0x4000030 },
+	{ 0x3d400264, 0x900093e7 },
+	{ 0x3d40026c, 0x2005574 },
+	{ 0x3d400400, 0x111 },
+	{ 0x3d400404, 0x72ff },
+	{ 0x3d400408, 0x72ff },
+	{ 0x3d400494, 0x2100e07 },
+	{ 0x3d400498, 0x620096 },
+	{ 0x3d40049c, 0x1100e07 },
+	{ 0x3d4004a0, 0xc8012c },
+	{ 0x3d402020, 0x1021 },
+	{ 0x3d402024, 0x30d400 },
+	{ 0x3d402050, 0x20d000 },
+	{ 0x3d402064, 0xc001c },
+	{ 0x3d4020dc, 0x840000 },
+	{ 0x3d4020e0, 0x330000 },
+	{ 0x3d4020e8, 0x660048 },
+	{ 0x3d4020ec, 0x160048 },
+	{ 0x3d402100, 0xa040305 },
+	{ 0x3d402104, 0x30407 },
+	{ 0x3d402108, 0x203060b },
+	{ 0x3d40210c, 0x505000 },
+	{ 0x3d402110, 0x2040202 },
+	{ 0x3d402114, 0x2030202 },
+	{ 0x3d402118, 0x1010004 },
+	{ 0x3d40211c, 0x301 },
+	{ 0x3d402130, 0x20300 },
+	{ 0x3d402134, 0xa100002 },
+	{ 0x3d402138, 0x1d },
+	{ 0x3d402144, 0x14000a },
+	{ 0x3d402180, 0x640004 },
+	{ 0x3d402190, 0x3818200 },
+	{ 0x3d402194, 0x80303 },
+	{ 0x3d4021b4, 0x100 },
+	{ 0x3d4020f4, 0xc99 },
+	{ 0x3d403020, 0x1021 },
+	{ 0x3d403024, 0xc3500 },
+	{ 0x3d403050, 0x20d000 },
+	{ 0x3d403064, 0x30007 },
+	{ 0x3d4030dc, 0x840000 },
+	{ 0x3d4030e0, 0x330000 },
+	{ 0x3d4030e8, 0x660048 },
+	{ 0x3d4030ec, 0x160048 },
+	{ 0x3d403100, 0xa010102 },
+	{ 0x3d403104, 0x30404 },
+	{ 0x3d403108, 0x203060b },
+	{ 0x3d40310c, 0x505000 },
+	{ 0x3d403110, 0x2040202 },
+	{ 0x3d403114, 0x2030202 },
+	{ 0x3d403118, 0x1010004 },
+	{ 0x3d40311c, 0x301 },
+	{ 0x3d403130, 0x20300 },
+	{ 0x3d403134, 0xa100002 },
+	{ 0x3d403138, 0x8 },
+	{ 0x3d403144, 0x50003 },
+	{ 0x3d403180, 0x190004 },
+	{ 0x3d403190, 0x3818200 },
+	{ 0x3d403194, 0x80303 },
+	{ 0x3d4031b4, 0x100 },
+	{ 0x3d4030f4, 0xc99 },
+	{ 0x3d400028, 0x0 },
+};
+
+/* PHY Initialize Configuration */
+struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x1 },
+	{ 0x100a2, 0x2 },
+	{ 0x100a3, 0x3 },
+	{ 0x100a4, 0x4 },
+	{ 0x100a5, 0x5 },
+	{ 0x100a6, 0x6 },
+	{ 0x100a7, 0x7 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x1 },
+	{ 0x110a2, 0x3 },
+	{ 0x110a3, 0x4 },
+	{ 0x110a4, 0x5 },
+	{ 0x110a5, 0x2 },
+	{ 0x110a6, 0x7 },
+	{ 0x110a7, 0x6 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x1 },
+	{ 0x120a2, 0x3 },
+	{ 0x120a3, 0x2 },
+	{ 0x120a4, 0x5 },
+	{ 0x120a5, 0x4 },
+	{ 0x120a6, 0x7 },
+	{ 0x120a7, 0x6 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x1 },
+	{ 0x130a2, 0x2 },
+	{ 0x130a3, 0x3 },
+	{ 0x130a4, 0x4 },
+	{ 0x130a5, 0x5 },
+	{ 0x130a6, 0x6 },
+	{ 0x130a7, 0x7 },
+	{ 0x1005f, 0x1ff },
+	{ 0x1015f, 0x1ff },
+	{ 0x1105f, 0x1ff },
+	{ 0x1115f, 0x1ff },
+	{ 0x1205f, 0x1ff },
+	{ 0x1215f, 0x1ff },
+	{ 0x1305f, 0x1ff },
+	{ 0x1315f, 0x1ff },
+	{ 0x11005f, 0x1ff },
+	{ 0x11015f, 0x1ff },
+	{ 0x11105f, 0x1ff },
+	{ 0x11115f, 0x1ff },
+	{ 0x11205f, 0x1ff },
+	{ 0x11215f, 0x1ff },
+	{ 0x11305f, 0x1ff },
+	{ 0x11315f, 0x1ff },
+	{ 0x21005f, 0x1ff },
+	{ 0x21015f, 0x1ff },
+	{ 0x21105f, 0x1ff },
+	{ 0x21115f, 0x1ff },
+	{ 0x21205f, 0x1ff },
+	{ 0x21215f, 0x1ff },
+	{ 0x21305f, 0x1ff },
+	{ 0x21315f, 0x1ff },
+	{ 0x55, 0x1ff },
+	{ 0x1055, 0x1ff },
+	{ 0x2055, 0x1ff },
+	{ 0x3055, 0x1ff },
+	{ 0x4055, 0x1ff },
+	{ 0x5055, 0x1ff },
+	{ 0x6055, 0x1ff },
+	{ 0x7055, 0x1ff },
+	{ 0x8055, 0x1ff },
+	{ 0x9055, 0x1ff },
+	{ 0x200c5, 0x18 },
+	{ 0x1200c5, 0x7 },
+	{ 0x2200c5, 0x7 },
+	{ 0x2002e, 0x2 },
+	{ 0x12002e, 0x2 },
+	{ 0x22002e, 0x2 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x20024, 0x1e3 },
+	{ 0x2003a, 0x2 },
+	{ 0x120024, 0x1e3 },
+	{ 0x2003a, 0x2 },
+	{ 0x220024, 0x1e3 },
+	{ 0x2003a, 0x2 },
+	{ 0x20056, 0x3 },
+	{ 0x120056, 0x3 },
+	{ 0x220056, 0x3 },
+	{ 0x1004d, 0xe00 },
+	{ 0x1014d, 0xe00 },
+	{ 0x1104d, 0xe00 },
+	{ 0x1114d, 0xe00 },
+	{ 0x1204d, 0xe00 },
+	{ 0x1214d, 0xe00 },
+	{ 0x1304d, 0xe00 },
+	{ 0x1314d, 0xe00 },
+	{ 0x11004d, 0xe00 },
+	{ 0x11014d, 0xe00 },
+	{ 0x11104d, 0xe00 },
+	{ 0x11114d, 0xe00 },
+	{ 0x11204d, 0xe00 },
+	{ 0x11214d, 0xe00 },
+	{ 0x11304d, 0xe00 },
+	{ 0x11314d, 0xe00 },
+	{ 0x21004d, 0xe00 },
+	{ 0x21014d, 0xe00 },
+	{ 0x21104d, 0xe00 },
+	{ 0x21114d, 0xe00 },
+	{ 0x21204d, 0xe00 },
+	{ 0x21214d, 0xe00 },
+	{ 0x21304d, 0xe00 },
+	{ 0x21314d, 0xe00 },
+	{ 0x10049, 0xeba },
+	{ 0x10149, 0xeba },
+	{ 0x11049, 0xeba },
+	{ 0x11149, 0xeba },
+	{ 0x12049, 0xeba },
+	{ 0x12149, 0xeba },
+	{ 0x13049, 0xeba },
+	{ 0x13149, 0xeba },
+	{ 0x110049, 0xeba },
+	{ 0x110149, 0xeba },
+	{ 0x111049, 0xeba },
+	{ 0x111149, 0xeba },
+	{ 0x112049, 0xeba },
+	{ 0x112149, 0xeba },
+	{ 0x113049, 0xeba },
+	{ 0x113149, 0xeba },
+	{ 0x210049, 0xeba },
+	{ 0x210149, 0xeba },
+	{ 0x211049, 0xeba },
+	{ 0x211149, 0xeba },
+	{ 0x212049, 0xeba },
+	{ 0x212149, 0xeba },
+	{ 0x213049, 0xeba },
+	{ 0x213149, 0xeba },
+	{ 0x43, 0x63 },
+	{ 0x1043, 0x63 },
+	{ 0x2043, 0x63 },
+	{ 0x3043, 0x63 },
+	{ 0x4043, 0x63 },
+	{ 0x5043, 0x63 },
+	{ 0x6043, 0x63 },
+	{ 0x7043, 0x63 },
+	{ 0x8043, 0x63 },
+	{ 0x9043, 0x63 },
+	{ 0x20018, 0x3 },
+	{ 0x20075, 0x4 },
+	{ 0x20050, 0x0 },
+	{ 0x20008, 0x3e8 },
+	{ 0x120008, 0x64 },
+	{ 0x220008, 0x19 },
+	{ 0x20088, 0x9 },
+	{ 0x200b2, 0x104 },
+	{ 0x10043, 0x5a1 },
+	{ 0x10143, 0x5a1 },
+	{ 0x11043, 0x5a1 },
+	{ 0x11143, 0x5a1 },
+	{ 0x12043, 0x5a1 },
+	{ 0x12143, 0x5a1 },
+	{ 0x13043, 0x5a1 },
+	{ 0x13143, 0x5a1 },
+	{ 0x1200b2, 0x104 },
+	{ 0x110043, 0x5a1 },
+	{ 0x110143, 0x5a1 },
+	{ 0x111043, 0x5a1 },
+	{ 0x111143, 0x5a1 },
+	{ 0x112043, 0x5a1 },
+	{ 0x112143, 0x5a1 },
+	{ 0x113043, 0x5a1 },
+	{ 0x113143, 0x5a1 },
+	{ 0x2200b2, 0x104 },
+	{ 0x210043, 0x5a1 },
+	{ 0x210143, 0x5a1 },
+	{ 0x211043, 0x5a1 },
+	{ 0x211143, 0x5a1 },
+	{ 0x212043, 0x5a1 },
+	{ 0x212143, 0x5a1 },
+	{ 0x213043, 0x5a1 },
+	{ 0x213143, 0x5a1 },
+	{ 0x200fa, 0x1 },
+	{ 0x1200fa, 0x1 },
+	{ 0x2200fa, 0x1 },
+	{ 0x20019, 0x1 },
+	{ 0x120019, 0x1 },
+	{ 0x220019, 0x1 },
+	{ 0x200f0, 0x660 },
+	{ 0x200f1, 0x0 },
+	{ 0x200f2, 0x4444 },
+	{ 0x200f3, 0x8888 },
+	{ 0x200f4, 0x5665 },
+	{ 0x200f5, 0x0 },
+	{ 0x200f6, 0x0 },
+	{ 0x200f7, 0xf000 },
+	{ 0x20025, 0x0 },
+	{ 0x2002d, 0x0 },
+	{ 0x12002d, 0x0 },
+	{ 0x22002d, 0x0 },
+	{ 0x2007d, 0x212 },
+	{ 0x12007d, 0x212 },
+	{ 0x22007d, 0x212 },
+	{ 0x2007c, 0x61 },
+	{ 0x12007c, 0x61 },
+	{ 0x22007c, 0x61 },
+	{ 0x1004a, 0x500 },
+	{ 0x1104a, 0x500 },
+	{ 0x1204a, 0x500 },
+	{ 0x1304a, 0x500 },
+	{ 0x2002c, 0x0 },
+};
+
+/* ddr phy trained csr */
+struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
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+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xfa0 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x131f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x110 },
+	{ 0x54019, 0x3ff4 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x3ff4 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x1 },
+	{ 0x54032, 0xf400 },
+	{ 0x54033, 0x333f },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0xf400 },
+	{ 0x54039, 0x333f },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P1 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54002, 0x101 },
+	{ 0x54003, 0x190 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x110 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x1 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, 0x3300 },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, 0x3300 },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P2 message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp2_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54002, 0x102 },
+	{ 0x54003, 0x64 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54012, 0x110 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x1 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, 0x3300 },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, 0x3300 },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P0 2D message block paremeter for training firmware */
+struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xfa0 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x2228 },
+	{ 0x54006, 0x14 },
+	{ 0x54008, 0x61 },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400d, 0x100 },
+	{ 0x5400f, 0x100 },
+	{ 0x54010, 0x1f7f },
+	{ 0x54012, 0x110 },
+	{ 0x54019, 0x3ff4 },
+	{ 0x5401a, 0x33 },
+	{ 0x5401b, 0x4866 },
+	{ 0x5401c, 0x4800 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x3ff4 },
+	{ 0x54020, 0x33 },
+	{ 0x54021, 0x4866 },
+	{ 0x54022, 0x4800 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x1 },
+	{ 0x54032, 0xf400 },
+	{ 0x54033, 0x333f },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x48 },
+	{ 0x54036, 0x48 },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0xf400 },
+	{ 0x54039, 0x333f },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x48 },
+	{ 0x5403c, 0x48 },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+struct dram_cfg_param ddr_phy_pie[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x90000, 0x10 },
+	{ 0x90001, 0x400 },
+	{ 0x90002, 0x10e },
+	{ 0x90003, 0x0 },
+	{ 0x90004, 0x0 },
+	{ 0x90005, 0x8 },
+	{ 0x90029, 0xb },
+	{ 0x9002a, 0x480 },
+	{ 0x9002b, 0x109 },
+	{ 0x9002c, 0x8 },
+	{ 0x9002d, 0x448 },
+	{ 0x9002e, 0x139 },
+	{ 0x9002f, 0x8 },
+	{ 0x90030, 0x478 },
+	{ 0x90031, 0x109 },
+	{ 0x90032, 0x0 },
+	{ 0x90033, 0xe8 },
+	{ 0x90034, 0x109 },
+	{ 0x90035, 0x2 },
+	{ 0x90036, 0x10 },
+	{ 0x90037, 0x139 },
+	{ 0x90038, 0xb },
+	{ 0x90039, 0x7c0 },
+	{ 0x9003a, 0x139 },
+	{ 0x9003b, 0x44 },
+	{ 0x9003c, 0x633 },
+	{ 0x9003d, 0x159 },
+	{ 0x9003e, 0x14f },
+	{ 0x9003f, 0x630 },
+	{ 0x90040, 0x159 },
+	{ 0x90041, 0x47 },
+	{ 0x90042, 0x633 },
+	{ 0x90043, 0x149 },
+	{ 0x90044, 0x4f },
+	{ 0x90045, 0x633 },
+	{ 0x90046, 0x179 },
+	{ 0x90047, 0x8 },
+	{ 0x90048, 0xe0 },
+	{ 0x90049, 0x109 },
+	{ 0x9004a, 0x0 },
+	{ 0x9004b, 0x7c8 },
+	{ 0x9004c, 0x109 },
+	{ 0x9004d, 0x0 },
+	{ 0x9004e, 0x1 },
+	{ 0x9004f, 0x8 },
+	{ 0x90050, 0x0 },
+	{ 0x90051, 0x45a },
+	{ 0x90052, 0x9 },
+	{ 0x90053, 0x0 },
+	{ 0x90054, 0x448 },
+	{ 0x90055, 0x109 },
+	{ 0x90056, 0x40 },
+	{ 0x90057, 0x633 },
+	{ 0x90058, 0x179 },
+	{ 0x90059, 0x1 },
+	{ 0x9005a, 0x618 },
+	{ 0x9005b, 0x109 },
+	{ 0x9005c, 0x40c0 },
+	{ 0x9005d, 0x633 },
+	{ 0x9005e, 0x149 },
+	{ 0x9005f, 0x8 },
+	{ 0x90060, 0x4 },
+	{ 0x90061, 0x48 },
+	{ 0x90062, 0x4040 },
+	{ 0x90063, 0x633 },
+	{ 0x90064, 0x149 },
+	{ 0x90065, 0x0 },
+	{ 0x90066, 0x4 },
+	{ 0x90067, 0x48 },
+	{ 0x90068, 0x40 },
+	{ 0x90069, 0x633 },
+	{ 0x9006a, 0x149 },
+	{ 0x9006b, 0x10 },
+	{ 0x9006c, 0x4 },
+	{ 0x9006d, 0x18 },
+	{ 0x9006e, 0x0 },
+	{ 0x9006f, 0x4 },
+	{ 0x90070, 0x78 },
+	{ 0x90071, 0x549 },
+	{ 0x90072, 0x633 },
+	{ 0x90073, 0x159 },
+	{ 0x90074, 0xd49 },
+	{ 0x90075, 0x633 },
+	{ 0x90076, 0x159 },
+	{ 0x90077, 0x94a },
+	{ 0x90078, 0x633 },
+	{ 0x90079, 0x159 },
+	{ 0x9007a, 0x441 },
+	{ 0x9007b, 0x633 },
+	{ 0x9007c, 0x149 },
+	{ 0x9007d, 0x42 },
+	{ 0x9007e, 0x633 },
+	{ 0x9007f, 0x149 },
+	{ 0x90080, 0x1 },
+	{ 0x90081, 0x633 },
+	{ 0x90082, 0x149 },
+	{ 0x90083, 0x0 },
+	{ 0x90084, 0xe0 },
+	{ 0x90085, 0x109 },
+	{ 0x90086, 0xa },
+	{ 0x90087, 0x10 },
+	{ 0x90088, 0x109 },
+	{ 0x90089, 0x9 },
+	{ 0x9008a, 0x3c0 },
+	{ 0x9008b, 0x149 },
+	{ 0x9008c, 0x9 },
+	{ 0x9008d, 0x3c0 },
+	{ 0x9008e, 0x159 },
+	{ 0x9008f, 0x18 },
+	{ 0x90090, 0x10 },
+	{ 0x90091, 0x109 },
+	{ 0x90092, 0x0 },
+	{ 0x90093, 0x3c0 },
+	{ 0x90094, 0x109 },
+	{ 0x90095, 0x18 },
+	{ 0x90096, 0x4 },
+	{ 0x90097, 0x48 },
+	{ 0x90098, 0x18 },
+	{ 0x90099, 0x4 },
+	{ 0x9009a, 0x58 },
+	{ 0x9009b, 0xb },
+	{ 0x9009c, 0x10 },
+	{ 0x9009d, 0x109 },
+	{ 0x9009e, 0x1 },
+	{ 0x9009f, 0x10 },
+	{ 0x900a0, 0x109 },
+	{ 0x900a1, 0x5 },
+	{ 0x900a2, 0x7c0 },
+	{ 0x900a3, 0x109 },
+	{ 0x40000, 0x811 },
+	{ 0x40020, 0x880 },
+	{ 0x40040, 0x0 },
+	{ 0x40060, 0x0 },
+	{ 0x40001, 0x4008 },
+	{ 0x40021, 0x83 },
+	{ 0x40041, 0x4f },
+	{ 0x40061, 0x0 },
+	{ 0x40002, 0x4040 },
+	{ 0x40022, 0x83 },
+	{ 0x40042, 0x51 },
+	{ 0x40062, 0x0 },
+	{ 0x40003, 0x811 },
+	{ 0x40023, 0x880 },
+	{ 0x40043, 0x0 },
+	{ 0x40063, 0x0 },
+	{ 0x40004, 0x720 },
+	{ 0x40024, 0xf },
+	{ 0x40044, 0x1740 },
+	{ 0x40064, 0x0 },
+	{ 0x40005, 0x16 },
+	{ 0x40025, 0x83 },
+	{ 0x40045, 0x4b },
+	{ 0x40065, 0x0 },
+	{ 0x40006, 0x716 },
+	{ 0x40026, 0xf },
+	{ 0x40046, 0x2001 },
+	{ 0x40066, 0x0 },
+	{ 0x40007, 0x716 },
+	{ 0x40027, 0xf },
+	{ 0x40047, 0x2800 },
+	{ 0x40067, 0x0 },
+	{ 0x40008, 0x716 },
+	{ 0x40028, 0xf },
+	{ 0x40048, 0xf00 },
+	{ 0x40068, 0x0 },
+	{ 0x40009, 0x720 },
+	{ 0x40029, 0xf },
+	{ 0x40049, 0x1400 },
+	{ 0x40069, 0x0 },
+	{ 0x4000a, 0xe08 },
+	{ 0x4002a, 0xc15 },
+	{ 0x4004a, 0x0 },
+	{ 0x4006a, 0x0 },
+	{ 0x4000b, 0x625 },
+	{ 0x4002b, 0x15 },
+	{ 0x4004b, 0x0 },
+	{ 0x4006b, 0x0 },
+	{ 0x4000c, 0x4028 },
+	{ 0x4002c, 0x80 },
+	{ 0x4004c, 0x0 },
+	{ 0x4006c, 0x0 },
+	{ 0x4000d, 0xe08 },
+	{ 0x4002d, 0xc1a },
+	{ 0x4004d, 0x0 },
+	{ 0x4006d, 0x0 },
+	{ 0x4000e, 0x625 },
+	{ 0x4002e, 0x1a },
+	{ 0x4004e, 0x0 },
+	{ 0x4006e, 0x0 },
+	{ 0x4000f, 0x4040 },
+	{ 0x4002f, 0x80 },
+	{ 0x4004f, 0x0 },
+	{ 0x4006f, 0x0 },
+	{ 0x40010, 0x2604 },
+	{ 0x40030, 0x15 },
+	{ 0x40050, 0x0 },
+	{ 0x40070, 0x0 },
+	{ 0x40011, 0x708 },
+	{ 0x40031, 0x5 },
+	{ 0x40051, 0x0 },
+	{ 0x40071, 0x2002 },
+	{ 0x40012, 0x8 },
+	{ 0x40032, 0x80 },
+	{ 0x40052, 0x0 },
+	{ 0x40072, 0x0 },
+	{ 0x40013, 0x2604 },
+	{ 0x40033, 0x1a },
+	{ 0x40053, 0x0 },
+	{ 0x40073, 0x0 },
+	{ 0x40014, 0x708 },
+	{ 0x40034, 0xa },
+	{ 0x40054, 0x0 },
+	{ 0x40074, 0x2002 },
+	{ 0x40015, 0x4040 },
+	{ 0x40035, 0x80 },
+	{ 0x40055, 0x0 },
+	{ 0x40075, 0x0 },
+	{ 0x40016, 0x60a },
+	{ 0x40036, 0x15 },
+	{ 0x40056, 0x1200 },
+	{ 0x40076, 0x0 },
+	{ 0x40017, 0x61a },
+	{ 0x40037, 0x15 },
+	{ 0x40057, 0x1300 },
+	{ 0x40077, 0x0 },
+	{ 0x40018, 0x60a },
+	{ 0x40038, 0x1a },
+	{ 0x40058, 0x1200 },
+	{ 0x40078, 0x0 },
+	{ 0x40019, 0x642 },
+	{ 0x40039, 0x1a },
+	{ 0x40059, 0x1300 },
+	{ 0x40079, 0x0 },
+	{ 0x4001a, 0x4808 },
+	{ 0x4003a, 0x880 },
+	{ 0x4005a, 0x0 },
+	{ 0x4007a, 0x0 },
+	{ 0x900a4, 0x0 },
+	{ 0x900a5, 0x790 },
+	{ 0x900a6, 0x11a },
+	{ 0x900a7, 0x8 },
+	{ 0x900a8, 0x7aa },
+	{ 0x900a9, 0x2a },
+	{ 0x900aa, 0x10 },
+	{ 0x900ab, 0x7b2 },
+	{ 0x900ac, 0x2a },
+	{ 0x900ad, 0x0 },
+	{ 0x900ae, 0x7c8 },
+	{ 0x900af, 0x109 },
+	{ 0x900b0, 0x10 },
+	{ 0x900b1, 0x10 },
+	{ 0x900b2, 0x109 },
+	{ 0x900b3, 0x10 },
+	{ 0x900b4, 0x2a8 },
+	{ 0x900b5, 0x129 },
+	{ 0x900b6, 0x8 },
+	{ 0x900b7, 0x370 },
+	{ 0x900b8, 0x129 },
+	{ 0x900b9, 0xa },
+	{ 0x900ba, 0x3c8 },
+	{ 0x900bb, 0x1a9 },
+	{ 0x900bc, 0xc },
+	{ 0x900bd, 0x408 },
+	{ 0x900be, 0x199 },
+	{ 0x900bf, 0x14 },
+	{ 0x900c0, 0x790 },
+	{ 0x900c1, 0x11a },
+	{ 0x900c2, 0x8 },
+	{ 0x900c3, 0x4 },
+	{ 0x900c4, 0x18 },
+	{ 0x900c5, 0xe },
+	{ 0x900c6, 0x408 },
+	{ 0x900c7, 0x199 },
+	{ 0x900c8, 0x8 },
+	{ 0x900c9, 0x8568 },
+	{ 0x900ca, 0x108 },
+	{ 0x900cb, 0x18 },
+	{ 0x900cc, 0x790 },
+	{ 0x900cd, 0x16a },
+	{ 0x900ce, 0x8 },
+	{ 0x900cf, 0x1d8 },
+	{ 0x900d0, 0x169 },
+	{ 0x900d1, 0x10 },
+	{ 0x900d2, 0x8558 },
+	{ 0x900d3, 0x168 },
+	{ 0x900d4, 0x70 },
+	{ 0x900d5, 0x788 },
+	{ 0x900d6, 0x16a },
+	{ 0x900d7, 0x1ff8 },
+	{ 0x900d8, 0x85a8 },
+	{ 0x900d9, 0x1e8 },
+	{ 0x900da, 0x50 },
+	{ 0x900db, 0x798 },
+	{ 0x900dc, 0x16a },
+	{ 0x900dd, 0x60 },
+	{ 0x900de, 0x7a0 },
+	{ 0x900df, 0x16a },
+	{ 0x900e0, 0x8 },
+	{ 0x900e1, 0x8310 },
+	{ 0x900e2, 0x168 },
+	{ 0x900e3, 0x8 },
+	{ 0x900e4, 0xa310 },
+	{ 0x900e5, 0x168 },
+	{ 0x900e6, 0xa },
+	{ 0x900e7, 0x408 },
+	{ 0x900e8, 0x169 },
+	{ 0x900e9, 0x6e },
+	{ 0x900ea, 0x0 },
+	{ 0x900eb, 0x68 },
+	{ 0x900ec, 0x0 },
+	{ 0x900ed, 0x408 },
+	{ 0x900ee, 0x169 },
+	{ 0x900ef, 0x0 },
+	{ 0x900f0, 0x8310 },
+	{ 0x900f1, 0x168 },
+	{ 0x900f2, 0x0 },
+	{ 0x900f3, 0xa310 },
+	{ 0x900f4, 0x168 },
+	{ 0x900f5, 0x1ff8 },
+	{ 0x900f6, 0x85a8 },
+	{ 0x900f7, 0x1e8 },
+	{ 0x900f8, 0x68 },
+	{ 0x900f9, 0x798 },
+	{ 0x900fa, 0x16a },
+	{ 0x900fb, 0x78 },
+	{ 0x900fc, 0x7a0 },
+	{ 0x900fd, 0x16a },
+	{ 0x900fe, 0x68 },
+	{ 0x900ff, 0x790 },
+	{ 0x90100, 0x16a },
+	{ 0x90101, 0x8 },
+	{ 0x90102, 0x8b10 },
+	{ 0x90103, 0x168 },
+	{ 0x90104, 0x8 },
+	{ 0x90105, 0xab10 },
+	{ 0x90106, 0x168 },
+	{ 0x90107, 0xa },
+	{ 0x90108, 0x408 },
+	{ 0x90109, 0x169 },
+	{ 0x9010a, 0x58 },
+	{ 0x9010b, 0x0 },
+	{ 0x9010c, 0x68 },
+	{ 0x9010d, 0x0 },
+	{ 0x9010e, 0x408 },
+	{ 0x9010f, 0x169 },
+	{ 0x90110, 0x0 },
+	{ 0x90111, 0x8b10 },
+	{ 0x90112, 0x168 },
+	{ 0x90113, 0x1 },
+	{ 0x90114, 0xab10 },
+	{ 0x90115, 0x168 },
+	{ 0x90116, 0x0 },
+	{ 0x90117, 0x1d8 },
+	{ 0x90118, 0x169 },
+	{ 0x90119, 0x80 },
+	{ 0x9011a, 0x790 },
+	{ 0x9011b, 0x16a },
+	{ 0x9011c, 0x18 },
+	{ 0x9011d, 0x7aa },
+	{ 0x9011e, 0x6a },
+	{ 0x9011f, 0xa },
+	{ 0x90120, 0x0 },
+	{ 0x90121, 0x1e9 },
+	{ 0x90122, 0x8 },
+	{ 0x90123, 0x8080 },
+	{ 0x90124, 0x108 },
+	{ 0x90125, 0xf },
+	{ 0x90126, 0x408 },
+	{ 0x90127, 0x169 },
+	{ 0x90128, 0xc },
+	{ 0x90129, 0x0 },
+	{ 0x9012a, 0x68 },
+	{ 0x9012b, 0x9 },
+	{ 0x9012c, 0x0 },
+	{ 0x9012d, 0x1a9 },
+	{ 0x9012e, 0x0 },
+	{ 0x9012f, 0x408 },
+	{ 0x90130, 0x169 },
+	{ 0x90131, 0x0 },
+	{ 0x90132, 0x8080 },
+	{ 0x90133, 0x108 },
+	{ 0x90134, 0x8 },
+	{ 0x90135, 0x7aa },
+	{ 0x90136, 0x6a },
+	{ 0x90137, 0x0 },
+	{ 0x90138, 0x8568 },
+	{ 0x90139, 0x108 },
+	{ 0x9013a, 0xb7 },
+	{ 0x9013b, 0x790 },
+	{ 0x9013c, 0x16a },
+	{ 0x9013d, 0x1f },
+	{ 0x9013e, 0x0 },
+	{ 0x9013f, 0x68 },
+	{ 0x90140, 0x8 },
+	{ 0x90141, 0x8558 },
+	{ 0x90142, 0x168 },
+	{ 0x90143, 0xf },
+	{ 0x90144, 0x408 },
+	{ 0x90145, 0x169 },
+	{ 0x90146, 0xd },
+	{ 0x90147, 0x0 },
+	{ 0x90148, 0x68 },
+	{ 0x90149, 0x0 },
+	{ 0x9014a, 0x408 },
+	{ 0x9014b, 0x169 },
+	{ 0x9014c, 0x0 },
+	{ 0x9014d, 0x8558 },
+	{ 0x9014e, 0x168 },
+	{ 0x9014f, 0x8 },
+	{ 0x90150, 0x3c8 },
+	{ 0x90151, 0x1a9 },
+	{ 0x90152, 0x3 },
+	{ 0x90153, 0x370 },
+	{ 0x90154, 0x129 },
+	{ 0x90155, 0x20 },
+	{ 0x90156, 0x2aa },
+	{ 0x90157, 0x9 },
+	{ 0x90158, 0x8 },
+	{ 0x90159, 0xe8 },
+	{ 0x9015a, 0x109 },
+	{ 0x9015b, 0x0 },
+	{ 0x9015c, 0x8140 },
+	{ 0x9015d, 0x10c },
+	{ 0x9015e, 0x10 },
+	{ 0x9015f, 0x8138 },
+	{ 0x90160, 0x104 },
+	{ 0x90161, 0x8 },
+	{ 0x90162, 0x448 },
+	{ 0x90163, 0x109 },
+	{ 0x90164, 0xf },
+	{ 0x90165, 0x7c0 },
+	{ 0x90166, 0x109 },
+	{ 0x90167, 0x0 },
+	{ 0x90168, 0xe8 },
+	{ 0x90169, 0x109 },
+	{ 0x9016a, 0x47 },
+	{ 0x9016b, 0x630 },
+	{ 0x9016c, 0x109 },
+	{ 0x9016d, 0x8 },
+	{ 0x9016e, 0x618 },
+	{ 0x9016f, 0x109 },
+	{ 0x90170, 0x8 },
+	{ 0x90171, 0xe0 },
+	{ 0x90172, 0x109 },
+	{ 0x90173, 0x0 },
+	{ 0x90174, 0x7c8 },
+	{ 0x90175, 0x109 },
+	{ 0x90176, 0x8 },
+	{ 0x90177, 0x8140 },
+	{ 0x90178, 0x10c },
+	{ 0x90179, 0x0 },
+	{ 0x9017a, 0x478 },
+	{ 0x9017b, 0x109 },
+	{ 0x9017c, 0x0 },
+	{ 0x9017d, 0x1 },
+	{ 0x9017e, 0x8 },
+	{ 0x9017f, 0x8 },
+	{ 0x90180, 0x4 },
+	{ 0x90181, 0x0 },
+	{ 0x90006, 0x8 },
+	{ 0x90007, 0x7c8 },
+	{ 0x90008, 0x109 },
+	{ 0x90009, 0x0 },
+	{ 0x9000a, 0x400 },
+	{ 0x9000b, 0x106 },
+	{ 0xd00e7, 0x400 },
+	{ 0x90017, 0x0 },
+	{ 0x9001f, 0x29 },
+	{ 0x90026, 0x68 },
+	{ 0x400d0, 0x0 },
+	{ 0x400d1, 0x101 },
+	{ 0x400d2, 0x105 },
+	{ 0x400d3, 0x107 },
+	{ 0x400d4, 0x10f },
+	{ 0x400d5, 0x202 },
+	{ 0x400d6, 0x20a },
+	{ 0x400d7, 0x20b },
+	{ 0x2003a, 0x2 },
+	{ 0x200be, 0x3 },
+	{ 0x2000b, 0x7d },
+	{ 0x2000c, 0xfa },
+	{ 0x2000d, 0x9c4 },
+	{ 0x2000e, 0x2c },
+	{ 0x12000b, 0xc },
+	{ 0x12000c, 0x19 },
+	{ 0x12000d, 0xfa },
+	{ 0x12000e, 0x10 },
+	{ 0x22000b, 0x3 },
+	{ 0x22000c, 0x6 },
+	{ 0x22000d, 0x3e },
+	{ 0x22000e, 0x10 },
+	{ 0x9000c, 0x0 },
+	{ 0x9000d, 0x173 },
+	{ 0x9000e, 0x60 },
+	{ 0x9000f, 0x6110 },
+	{ 0x90010, 0x2152 },
+	{ 0x90011, 0xdfbd },
+	{ 0x90012, 0x2060 },
+	{ 0x90013, 0x6152 },
+	{ 0x20010, 0x5a },
+	{ 0x20011, 0x3 },
+	{ 0x40080, 0xe0 },
+	{ 0x40081, 0x12 },
+	{ 0x40082, 0xe0 },
+	{ 0x40083, 0x12 },
+	{ 0x40084, 0xe0 },
+	{ 0x40085, 0x12 },
+	{ 0x140080, 0xe0 },
+	{ 0x140081, 0x12 },
+	{ 0x140082, 0xe0 },
+	{ 0x140083, 0x12 },
+	{ 0x140084, 0xe0 },
+	{ 0x140085, 0x12 },
+	{ 0x240080, 0xe0 },
+	{ 0x240081, 0x12 },
+	{ 0x240082, 0xe0 },
+	{ 0x240083, 0x12 },
+	{ 0x240084, 0xe0 },
+	{ 0x240085, 0x12 },
+	{ 0x400fd, 0xf },
+	{ 0x10011, 0x1 },
+	{ 0x10012, 0x1 },
+	{ 0x10013, 0x180 },
+	{ 0x10018, 0x1 },
+	{ 0x10002, 0x6209 },
+	{ 0x100b2, 0x1 },
+	{ 0x101b4, 0x1 },
+	{ 0x102b4, 0x1 },
+	{ 0x103b4, 0x1 },
+	{ 0x104b4, 0x1 },
+	{ 0x105b4, 0x1 },
+	{ 0x106b4, 0x1 },
+	{ 0x107b4, 0x1 },
+	{ 0x108b4, 0x1 },
+	{ 0x11011, 0x1 },
+	{ 0x11012, 0x1 },
+	{ 0x11013, 0x180 },
+	{ 0x11018, 0x1 },
+	{ 0x11002, 0x6209 },
+	{ 0x110b2, 0x1 },
+	{ 0x111b4, 0x1 },
+	{ 0x112b4, 0x1 },
+	{ 0x113b4, 0x1 },
+	{ 0x114b4, 0x1 },
+	{ 0x115b4, 0x1 },
+	{ 0x116b4, 0x1 },
+	{ 0x117b4, 0x1 },
+	{ 0x118b4, 0x1 },
+	{ 0x12011, 0x1 },
+	{ 0x12012, 0x1 },
+	{ 0x12013, 0x180 },
+	{ 0x12018, 0x1 },
+	{ 0x12002, 0x6209 },
+	{ 0x120b2, 0x1 },
+	{ 0x121b4, 0x1 },
+	{ 0x122b4, 0x1 },
+	{ 0x123b4, 0x1 },
+	{ 0x124b4, 0x1 },
+	{ 0x125b4, 0x1 },
+	{ 0x126b4, 0x1 },
+	{ 0x127b4, 0x1 },
+	{ 0x128b4, 0x1 },
+	{ 0x13011, 0x1 },
+	{ 0x13012, 0x1 },
+	{ 0x13013, 0x180 },
+	{ 0x13018, 0x1 },
+	{ 0x13002, 0x6209 },
+	{ 0x130b2, 0x1 },
+	{ 0x131b4, 0x1 },
+	{ 0x132b4, 0x1 },
+	{ 0x133b4, 0x1 },
+	{ 0x134b4, 0x1 },
+	{ 0x135b4, 0x1 },
+	{ 0x136b4, 0x1 },
+	{ 0x137b4, 0x1 },
+	{ 0x138b4, 0x1 },
+	{ 0x20089, 0x1 },
+	{ 0x20088, 0x19 },
+	{ 0xc0080, 0x2 },
+	{ 0xd0000, 0x1 }
+};
+
+struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 4000mts 1D */
+		.drate = 4000,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 400mts 1D */
+		.drate = 400,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P2 100mts 1D */
+		.drate = 100,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp2_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
+	},
+	{
+		/* P0 4000mts 2D */
+		.drate = 4000,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 4000, 400, 100, },
+};
diff --git a/board/engicam/imx8mp/spl.c b/board/engicam/imx8mp/spl.c
new file mode 100644
index 00000000000..6a16d58ae5a
--- /dev/null
+++ b/board/engicam/imx8mp/spl.c
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Amarula Solutions(India)
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * Authors:
+ * Manoj Sai <[email protected]>
+ * Jagan Teki <[email protected]>
+ */
+
+#include <common.h>
+#include <hang.h>
+#include <init.h>
+#include <log.h>
+#include <spl.h>
+#include <asm/global_data.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8mp_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/arch/ddr.h>
+#include <power/pmic.h>
+#include <power/pca9450.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spl_board_boot_device(enum boot_device boot_dev_spl)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_dram_init(void)
+{
+	ddr_init(&dram_timing);
+}
+
+#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+struct i2c_pads_info i2c_pad_info1 = {
+	.scl = {
+		.i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
+		.gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
+		.gp = IMX_GPIO_NR(5, 14),
+	},
+	.sda = {
+		.i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
+		.gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
+		.gp = IMX_GPIO_NR(5, 15),
+	},
+};
+
+#if CONFIG_IS_ENABLED(POWER_LEGACY)
+#define I2C_PMIC	0
+int power_init_board(void)
+{
+	struct pmic *p;
+	int ret;
+
+	ret = power_pca9450_init(I2C_PMIC, 0x25);
+	if (ret)
+		printf("power init failed");
+	p = pmic_get("PCA9450");
+	pmic_probe(p);
+
+	/* BUCKxOUT_DVS0/1 control BUCK123 output */
+	pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+
+#ifdef CONFIG_IMX8M_LPDDR4
+	/*
+	 * increase VDD_SOC to typical value 0.95V before first
+	 * DRAM access, set DVS1 to 0.85v for suspend.
+	 * Enable DVS control through PMIC_STBY_REQ and
+	 * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H)
+	 */
+#ifdef CONFIG_IMX8M_VDD_SOC_850MV
+	/* set DVS0 to 0.85v for special case*/
+	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
+#else
+	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
+#endif
+	pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
+	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+
+	/* Kernel uses OD/OD freq for SOC */
+	/* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */
+	pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+#elif defined(CONFIG_IMX8M_DDR4)
+	/* DDR4 runs at 3200MTS, uses default ND 0.85v for VDD_SOC and VDD_ARM */
+	pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+
+	/* Set NVCC_DRAM to 1.2v for DDR4 */
+	pmic_reg_write(p, PCA9450_BUCK6OUT, 0x18);
+#endif
+
+	/* set WDOG_B_CFG to cold reset */
+	pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
+
+	return 0;
+}
+#endif
+
+void spl_board_init(void)
+{
+	/* Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does not allow to change it.
+	 * Should set the clock after PMIC setting done.
+	 * Default is 400Mhz (system_pll1_800m with div = 2) set by ROM for ND VDD_SOC
+	 */
+	clock_enable(CCGR_GIC, 0);
+	clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
+	clock_enable(CCGR_GIC, 1);
+
+	puts("Normal Boot\n");
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+	int ret;
+
+	arch_cpu_init();
+
+	init_uart_clk(1);
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	preloader_console_init();
+
+	enable_tzc380();
+
+	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+	power_init_board();
+
+	/* DDR initialization */
+	spl_dram_init();
+}
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index e2eb1426c83..b5a2faf3a18 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -33,6 +33,8 @@ DECLARE_GLOBAL_DATA_PTR;
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
 	switch (boot_dev_spl) {
+	case USB_BOOT:
+		return BOOT_DEVICE_BOARD;
 	case SD2_BOOT:
 	case MMC2_BOOT:
 		return BOOT_DEVICE_MMC1;
@@ -53,15 +55,7 @@ static void spl_dram_init(void)
 
 void spl_board_init(void)
 {
-	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
-		struct udevice *dev;
-		int ret;
-
-		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
-		if (ret)
-			printf("Failed to initialize caam_jr: %d\n", ret);
-	}
-	puts("Normal Boot\n");
+	arch_misc_init();
 }
 
 #ifdef CONFIG_SPL_LOAD_FIT
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index c0bfb67199a..380abecd746 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -49,11 +49,8 @@ void spl_board_init(void)
 	struct udevice *dev;
 	int ret;
 
-	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
-		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
-		if (ret)
-			printf("Failed to initialize caam_jr: %d\n", ret);
-	}
+	arch_misc_init();
+
 	puts("Normal Boot\n");
 
 	ret = uclass_get_device_by_name(UCLASS_CLK,
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 719b1f6d7da..f1b285417d0 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -37,14 +37,8 @@ void spl_dram_init(void)
 
 void spl_board_init(void)
 {
-	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
-		struct udevice *dev;
-		int ret;
+	arch_misc_init();
 
-		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
-		if (ret)
-			printf("Failed to initialize caam_jr: %d\n", ret);
-	}
 	/*
 	 * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
 	 * not allow to change it. Should set the clock after PMIC
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 78d317d8647..0ecfd98c226 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -1280,3 +1280,8 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	return 0;
 }
 #endif /* CONFIG_OF_BOARD_SETUP */
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index ac52cc0a9ec..6aea60ad05c 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -299,7 +299,7 @@ static int eeprom_info(bool verbose)
 	return 0;
 }
 
-int eeprom_init(int quiet)
+int venice_eeprom_init(int quiet)
 {
 	char rev_pcb;
 	int rev_bom;
diff --git a/board/gateworks/venice/eeprom.h b/board/gateworks/venice/eeprom.h
index 8ea7318d7df..bb7a5fa9ad1 100644
--- a/board/gateworks/venice/eeprom.h
+++ b/board/gateworks/venice/eeprom.h
@@ -24,7 +24,7 @@ struct venice_board_info {
 	u8 chksum[2];	/* 0x4E */
 };
 
-int eeprom_init(int quiet);
+int venice_eeprom_init(int quiet);
 const char *eeprom_get_model(void);
 const char *eeprom_get_baseboard_model(void);
 const char *eeprom_get_dtb_name(int level, char *buf, int len);
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 4c0feb4381c..e06de8bb54c 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -156,28 +156,28 @@ static int power_init_board(void)
 		/* Buck 1 DVS control through PMIC_STBY_REQ */
 		dm_i2c_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
 
-		/* Set DVS1 to 0.8v for suspend */
-		dm_i2c_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10);
+		/* Set DVS1 to 0.85v for suspend */
+		dm_i2c_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
 
-		/* increase VDD_DRAM to 0.95v for 3Ghz DDR */
-		dm_i2c_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C);
+		/* increase VDD_SOC to 0.95V before first DRAM access */
+		dm_i2c_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
 
-		/* VDD_DRAM off in suspend: B1_ENMODE=10 */
-		dm_i2c_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a);
-
-		/* set VDD_SNVS_0V8 from default 0.85V */
-		dm_i2c_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
+		/* Kernel uses OD/OD freq for SOC */
+		/* To avoid timing risk from SOC to ARM, increase VDD_ARM to OD voltage 0.95v */
+		dm_i2c_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
 
 		/* set WDOG_B_CFG to cold reset */
 		dm_i2c_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
 	}
 
 	else if ((!strncmp(model, "GW7901", 6)) ||
-		 (!strncmp(model, "GW7902", 6))) {
-		if (!strncmp(model, "GW7901", 6))
-			ret = uclass_get_device_by_seq(UCLASS_I2C, 1, &bus);
-		else
+		 (!strncmp(model, "GW7902", 6)) ||
+		 (!strncmp(model, "GW7903", 6)) ||
+		 (!strncmp(model, "GW7904", 6))) {
+		if (!strncmp(model, "GW7902", 6))
 			ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
+		else
+			ret = uclass_get_device_by_seq(UCLASS_I2C, 1, &bus);
 		if (ret) {
 			printf("PMIC    : failed I2C2 probe: %d\n", ret);
 			return ret;
@@ -268,7 +268,7 @@ void board_init_f(ulong dummy)
 			break;
 		mdelay(1);
 	}
-	dram_sz = eeprom_init(0);
+	dram_sz = venice_eeprom_init(0);
 
 	/* PMIC */
 	power_init_board();
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index 32b25ffd3ed..d94f6b8a577 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -111,7 +111,7 @@ int board_phy_config(struct phy_device *phydev)
 
 int board_init(void)
 {
-	eeprom_init(1);
+	venice_eeprom_init(1);
 
 	if (IS_ENABLED(CONFIG_FEC_MXC))
 		setup_fec();
diff --git a/board/kontron/sl-mx6ul/MAINTAINERS b/board/kontron/sl-mx6ul/MAINTAINERS
index 0f8b5512d64..9e9dff0361c 100644
--- a/board/kontron/sl-mx6ul/MAINTAINERS
+++ b/board/kontron/sl-mx6ul/MAINTAINERS
@@ -1,8 +1,10 @@
 Kontron SL/BL i.MX6UL/ULL Boards (N63xx/N64xx)
 M:	Frieder Schrempf <[email protected]>
 S:	Maintained
-F:	arch/arm/dts/imx6ul-kontron-n6*
-F:	arch/arm/dts/imx6ull-kontron-n6*
+F:	arch/arm/dts/imx6ul-kontron-sl*
+F:	arch/arm/dts/imx6ul-kontron-bl*
+F:	arch/arm/dts/imx6ull-kontron-sl*
+F:	arch/arm/dts/imx6ull-kontron-bl*
 F:	board/kontron/sl-mx6ul
 F:	configs/kontron-sl-mx6ul_defconfig
 F:	doc/board/kontron/sl-mx6ul.rst
diff --git a/board/kontron/sl-mx6ul/Makefile b/board/kontron/sl-mx6ul/Makefile
index cae273c9309..6af5f65450a 100644
--- a/board/kontron/sl-mx6ul/Makefile
+++ b/board/kontron/sl-mx6ul/Makefile
@@ -6,3 +6,5 @@ obj-y := spl.o
 else
 obj-y := sl-mx6ul.o
 endif
+
+obj-y += sl-mx6ul-common.o
diff --git a/board/kontron/sl-mx6ul/sl-mx6ul-common.c b/board/kontron/sl-mx6ul/sl-mx6ul-common.c
new file mode 100644
index 00000000000..1f24acdfa3d
--- /dev/null
+++ b/board/kontron/sl-mx6ul/sl-mx6ul-common.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Kontron Electronics GmbH
+ */
+
+#include <asm/types.h>
+#include <asm/arch/sys_proto.h>
+
+#include <sl-mx6ul-common.h>
+
+bool sl_mx6ul_is_spi_nor_boot(void)
+{
+	u32 bmode = imx6_src_get_boot_mode();
+
+	/*
+	 * Check if "EEPROM Recovery" enabled and ECSPI2_CONREG not 0x0.
+	 * If this is the case and U-Boot didn't initialize the SPI bus
+	 * yet, we can safely assume that we are booting from SPI NOR.
+	 */
+	if ((bmode & 0x40000000) && readl(0x0200c008))
+		return true;
+
+	return false;
+}
diff --git a/board/kontron/sl-mx6ul/sl-mx6ul-common.h b/board/kontron/sl-mx6ul/sl-mx6ul-common.h
new file mode 100644
index 00000000000..58a0e77a8b0
--- /dev/null
+++ b/board/kontron/sl-mx6ul/sl-mx6ul-common.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022 Kontron Electronics GmbH
+ */
+
+#ifndef __SL_MX6UL_COMMON_H
+#define __SL_MX6UL_COMMON_H
+
+bool sl_mx6ul_is_spi_nor_boot(void);
+
+#endif // __SL_MX6UL_COMMON_H
diff --git a/board/kontron/sl-mx6ul/sl-mx6ul.c b/board/kontron/sl-mx6ul/sl-mx6ul.c
index 79d4d8753b0..0f45ea84fc7 100644
--- a/board/kontron/sl-mx6ul/sl-mx6ul.c
+++ b/board/kontron/sl-mx6ul/sl-mx6ul.c
@@ -6,8 +6,10 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/global_data.h>
+#include <env_internal.h>
 #include <fdt_support.h>
 #include <phy.h>
+#include <sl-mx6ul-common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -83,3 +85,16 @@ int board_init(void)
 
 	return 0;
 }
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+	if (prio)
+		return ENVL_UNKNOWN;
+
+	if (sl_mx6ul_is_spi_nor_boot() && CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+		return ENVL_SPI_FLASH;
+	else if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+		return ENVL_MMC;
+
+	return ENVL_NOWHERE;
+}
diff --git a/board/kontron/sl-mx6ul/sl-mx6ul.env b/board/kontron/sl-mx6ul/sl-mx6ul.env
new file mode 100644
index 00000000000..9484e739dd4
--- /dev/null
+++ b/board/kontron/sl-mx6ul/sl-mx6ul.env
@@ -0,0 +1,4 @@
+kernel_addr_r=0x82000000
+ramdisk_addr_r=0x88080000
+pxefile_addr_r=0x80100000
+scriptaddr=0x80100000
diff --git a/board/kontron/sl-mx6ul/spl.c b/board/kontron/sl-mx6ul/spl.c
index 12b0352146f..3ae8bf62094 100644
--- a/board/kontron/sl-mx6ul/spl.c
+++ b/board/kontron/sl-mx6ul/spl.c
@@ -17,12 +17,13 @@
 #include <linux/sizes.h>
 #include <linux/errno.h>
 #include <mmc.h>
+#include <sl-mx6ul-common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 enum {
-	BOARD_TYPE_KTN_N631X = 1,
-	BOARD_TYPE_KTN_N641X,
+	BOARD_TYPE_KTN_SL_UL = 1,
+	BOARD_TYPE_KTN_SL_ULL,
 	BOARD_TYPE_MAX
 };
 
@@ -294,9 +295,9 @@ static void spl_dram_init(void)
 static int do_board_detect(void)
 {
 	if (is_mx6ul())
-		gd->board_type = BOARD_TYPE_KTN_N631X;
+		gd->board_type = BOARD_TYPE_KTN_SL_UL;
 	else if (is_mx6ull())
-		gd->board_type = BOARD_TYPE_KTN_N641X;
+		gd->board_type = BOARD_TYPE_KTN_SL_ULL;
 
 	printf("Kontron SL i.MX6UL%s (N6%s1x) module, %lu MB RAM detected\n",
 	       is_mx6ull() ? "L" : "", is_mx6ull() ? "4" : "3", gd->ram_size / SZ_1M);
@@ -339,38 +340,42 @@ void board_boot_order(u32 *spl_boot_list)
 
 	/*
 	 * The default boot fuse settings use the SD card (MMC1) as primary
-	 * boot device, but allow SPI NOR as a fallback boot device.
-	 * We can't detect the fallback case and spl_boot_device() will return
-	 * BOOT_DEVICE_MMC1 despite the actual boot device being SPI NOR.
-	 * Therefore we try to load U-Boot proper vom SPI NOR after loading
-	 * from MMC has failed.
+	 * boot device, but allow SPI NOR as a fallback boot device. There
+	 * is no proper way to detect if the fallback was used. Therefore
+	 * we read the ECSPI2_CONREG register and see if it differs from the
+	 * reset value 0x0. If that's the case we can assume that the BootROM
+	 * has successfully probed the SPI NOR.
 	 */
-	spl_boot_list[0] = bootdev;
-
 	switch (bootdev) {
 	case BOOT_DEVICE_MMC1:
 	case BOOT_DEVICE_MMC2:
-		spl_boot_list[1] = BOOT_DEVICE_SPI;
+		if (sl_mx6ul_is_spi_nor_boot()) {
+			spl_boot_list[0] = BOOT_DEVICE_SPI;
+			return;
+		}
 		break;
 	}
+
+	spl_boot_list[0] = bootdev;
 }
 
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
-	setup_spi();
+	if (sl_mx6ul_is_spi_nor_boot())
+		setup_spi();
 
 	return 0;
 }
 
 int board_fit_config_name_match(const char *name)
 {
-	if (gd->board_type == BOARD_TYPE_KTN_N631X && is_mx6ul() &&
-	    !strcmp(name, "imx6ul-kontron-n631x-s"))
+	if (gd->board_type == BOARD_TYPE_KTN_SL_UL && is_mx6ul() &&
+	    (!strcmp(name, "imx6ul-kontron-n631x-s") || !strcmp(name, "imx6ul-kontron-bl")))
 		return 0;
 
-	if (gd->board_type == BOARD_TYPE_KTN_N641X && is_mx6ull() &&
-	    !strcmp(name, "imx6ull-kontron-n641x-s"))
+	if (gd->board_type == BOARD_TYPE_KTN_SL_ULL && is_mx6ull() &&
+	    (!strcmp(name, "imx6ull-kontron-n641x-s") || !strcmp(name, "imx6ull-kontron-bl")))
 		return 0;
 
 	return -1;
diff --git a/board/kontron/sl-mx8mm/MAINTAINERS b/board/kontron/sl-mx8mm/MAINTAINERS
index 5e68ae0305a..e4e12d3f558 100644
--- a/board/kontron/sl-mx8mm/MAINTAINERS
+++ b/board/kontron/sl-mx8mm/MAINTAINERS
@@ -1,7 +1,7 @@
 Kontron SL/BL i.MX8M Mini Boards (N801x)
 M:	Frieder Schrempf <[email protected]>
 S:	Maintained
-F:	arch/arm/dts/imx8mm-kontron-n801x-*
+F:	arch/arm/dts/imx8mm-kontron*
 F:	board/kontron/sl-mx8mm
 F:	configs/kontron-sl-mx8mm_defconfig
 F:	doc/board/kontron/sl-mx8mm.rst
diff --git a/board/kontron/sl-mx8mm/lpddr4_timing.c b/board/kontron/sl-mx8mm/lpddr4_timing.c
index 0eabb160185..74b79c7a009 100644
--- a/board/kontron/sl-mx8mm/lpddr4_timing.c
+++ b/board/kontron/sl-mx8mm/lpddr4_timing.c
@@ -10,313 +10,245 @@
 
 struct dram_cfg_param ddr_ddrc_cfg[] = {
 	/** Initialize DDRC registers **/
-	{0x3d400304, 0x1},
-	{0x3d400030, 0x1},
-	{0x3d400000, 0xa3080020},
-	{0x3d400020, 0x223},
-	{0x3d400024, 0x3a980},
-	{0x3d400064, 0x5b0087},
-	{0x3d4000d0, 0xc00305ba},
-	{0x3d4000d4, 0x940000},
-	{0x3d4000dc, 0xd4002d},
-	{0x3d4000e0, 0x310000},
-	{0x3d4000e8, 0x66004d},
-	{0x3d4000ec, 0x16004d},
-	{0x3d400100, 0x191e1920},
-	{0x3d400104, 0x60630},
-	{0x3d40010c, 0xb0b000},
-	{0x3d400110, 0xe04080e},
-	{0x3d400114, 0x2040c0c},
-	{0x3d400118, 0x1010007},
-	{0x3d40011c, 0x401},
-	{0x3d400130, 0x20600},
-	{0x3d400134, 0xc100002},
-	{0x3d400138, 0xd8},
-	{0x3d400144, 0x96004b},
-	{0x3d400180, 0x2ee0017},
-	{0x3d400184, 0x2605b8e},
-	{0x3d400188, 0x0},
-	{0x3d400190, 0x497820a},
-	{0x3d400194, 0x80303},
-	{0x3d4001b4, 0x170a},
-	{0x3d4001a0, 0xe0400018},
-	{0x3d4001a4, 0xdf00e4},
-	{0x3d4001a8, 0x80000000},
-	{0x3d4001b0, 0x11},
-	{0x3d4001c0, 0x1},
-	{0x3d4001c4, 0x1},
-	{0x3d4000f4, 0xc99},
-	{0x3d400108, 0x70e1617},
-	{0x3d400200, 0x17},
-	{0x3d40020c, 0x0},
-	{0x3d400210, 0x1f1f},
-	{0x3d400204, 0x80808},
-	{0x3d400214, 0x7070707},
-	{0x3d400218, 0x7070707},
-	{0x3d400250, 0x29001701},
-	{0x3d400254, 0x2c},
-	{0x3d40025c, 0x4000030},
-	{0x3d400264, 0x900093e7},
-	{0x3d40026c, 0x2005574},
-	{0x3d400400, 0x111},
-	{0x3d400408, 0x72ff},
-	{0x3d400494, 0x2100e07},
-	{0x3d400498, 0x620096},
-	{0x3d40049c, 0x1100e07},
-	{0x3d4004a0, 0xc8012c},
-	{0x3d402020, 0x21},
-	{0x3d402024, 0x7d00},
-	{0x3d402050, 0x20d040},
-	{0x3d402064, 0xc001c},
-	{0x3d4020dc, 0x840000},
-	{0x3d4020e0, 0x310000},
-	{0x3d4020e8, 0x66004d},
-	{0x3d4020ec, 0x16004d},
-	{0x3d402100, 0xa040305},
-	{0x3d402104, 0x30407},
-	{0x3d402108, 0x203060b},
-	{0x3d40210c, 0x505000},
-	{0x3d402110, 0x2040202},
-	{0x3d402114, 0x2030202},
-	{0x3d402118, 0x1010004},
-	{0x3d40211c, 0x301},
-	{0x3d402130, 0x20300},
-	{0x3d402134, 0xa100002},
-	{0x3d402138, 0x1d},
-	{0x3d402144, 0x14000a},
-	{0x3d402180, 0x640004},
-	{0x3d402190, 0x3818200},
-	{0x3d402194, 0x80303},
-	{0x3d4021b4, 0x100},
-	{0x3d403020, 0x21},
-	{0x3d403024, 0x1f40},
-	{0x3d403050, 0x20d040},
-	{0x3d403064, 0x30007},
-	{0x3d4030dc, 0x840000},
-	{0x3d4030e0, 0x310000},
-	{0x3d4030e8, 0x66004d},
-	{0x3d4030ec, 0x16004d},
-	{0x3d403100, 0xa010102},
-	{0x3d403104, 0x30404},
-	{0x3d403108, 0x203060b},
-	{0x3d40310c, 0x505000},
-	{0x3d403110, 0x2040202},
-	{0x3d403114, 0x2030202},
-	{0x3d403118, 0x1010004},
-	{0x3d40311c, 0x301},
-	{0x3d403130, 0x20300},
-	{0x3d403134, 0xa100002},
-	{0x3d403138, 0x8},
-	{0x3d403144, 0x50003},
-	{0x3d403180, 0x190004},
-	{0x3d403190, 0x3818200},
-	{0x3d403194, 0x80303},
-	{0x3d4031b4, 0x100},
-	{0x3d400028, 0x0},
+	{ 0x3d400304, 0x1 },
+	{ 0x3d400030, 0x1 },
+	{ 0x3d400000, 0xa3080020 },
+	{ 0x3d400020, 0x223 },
+	{ 0x3d400024, 0x3a980 },
+	{ 0x3d400064, 0x5b00d2 },
+	{ 0x3d4000d0, 0xc00305ba },
+	{ 0x3d4000d4, 0x940000 },
+	{ 0x3d4000dc, 0xd4002d },
+	{ 0x3d4000e0, 0x310000 },
+	{ 0x3d4000e8, 0x63004d },
+	{ 0x3d4000ec, 0x15004d },
+	{ 0x3d400100, 0x191e1920 },
+	{ 0x3d400104, 0x60630 },
+	{ 0x3d40010c, 0xb0b000 },
+	{ 0x3d400110, 0xe04080e },
+	{ 0x3d400114, 0x2040c0c },
+	{ 0x3d400118, 0x1010007 },
+	{ 0x3d40011c, 0x401 },
+	{ 0x3d400130, 0x20600 },
+	{ 0x3d400134, 0xc100002 },
+	{ 0x3d400138, 0xd8 },
+	{ 0x3d400144, 0x96004b },
+	{ 0x3d400180, 0x2ee0017 },
+	{ 0x3d400184, 0x2605b8e },
+	{ 0x3d400188, 0x0 },
+	{ 0x3d400190, 0x497820a },
+	{ 0x3d400194, 0x80303 },
+	{ 0x3d4001b4, 0x170a },
+	{ 0x3d4001a0, 0xe0400018 },
+	{ 0x3d4001a4, 0xdf00e4 },
+	{ 0x3d4001a8, 0x80000000 },
+	{ 0x3d4001b0, 0x11 },
+	{ 0x3d4001c0, 0x1 },
+	{ 0x3d4001c4, 0x1 },
+	{ 0x3d4000f4, 0xc99 },
+	{ 0x3d400108, 0x70e1617 },
+	{ 0x3d400200, 0x17 },
+	{ 0x3d40020c, 0x0 },
+	{ 0x3d400210, 0x1f1f },
+	{ 0x3d400204, 0x80808 },
+	{ 0x3d400214, 0x7070707 },
+	{ 0x3d400218, 0x7070707 },
+	{ 0x3d400250, 0x29001701 },
+	{ 0x3d400254, 0x2c },
+	{ 0x3d40025c, 0x4000030 },
+	{ 0x3d400264, 0x900093e7 },
+	{ 0x3d40026c, 0x2005574 },
+	{ 0x3d400400, 0x111 },
+	{ 0x3d400408, 0x72ff },
+	{ 0x3d400494, 0x2100e07 },
+	{ 0x3d400498, 0x620096 },
+	{ 0x3d40049c, 0x1100e07 },
+	{ 0x3d4004a0, 0xc8012c },
+	{ 0x3d402020, 0x21 },
+	{ 0x3d402024, 0x7d00 },
+	{ 0x3d402050, 0x20d040 },
+	{ 0x3d402064, 0xc001c },
+	{ 0x3d4020dc, 0x840000 },
+	{ 0x3d4020e0, 0x310000 },
+	{ 0x3d4020e8, 0x66004d },
+	{ 0x3d4020ec, 0x16004d },
+	{ 0x3d402100, 0xa040305 },
+	{ 0x3d402104, 0x30407 },
+	{ 0x3d402108, 0x203060b },
+	{ 0x3d40210c, 0x505000 },
+	{ 0x3d402110, 0x2040202 },
+	{ 0x3d402114, 0x2030202 },
+	{ 0x3d402118, 0x1010004 },
+	{ 0x3d40211c, 0x301 },
+	{ 0x3d402130, 0x20300 },
+	{ 0x3d402134, 0xa100002 },
+	{ 0x3d402138, 0x1d },
+	{ 0x3d402144, 0x14000a },
+	{ 0x3d402180, 0x640004 },
+	{ 0x3d402190, 0x3818200 },
+	{ 0x3d402194, 0x80303 },
+	{ 0x3d4021b4, 0x100 },
+	{ 0x3d4020f4, 0xc99 },
+	{ 0x3d400028, 0x0 },
 };
 
 /* PHY Initialize Configuration */
 struct dram_cfg_param ddr_ddrphy_cfg[] = {
-	{0x100a0, 0x0},
-	{0x100a1, 0x1},
-	{0x100a2, 0x2},
-	{0x100a3, 0x3},
-	{0x100a4, 0x4},
-	{0x100a5, 0x5},
-	{0x100a6, 0x6},
-	{0x100a7, 0x7},
-	{0x110a0, 0x0},
-	{0x110a1, 0x1},
-	{0x110a2, 0x3},
-	{0x110a3, 0x4},
-	{0x110a4, 0x5},
-	{0x110a5, 0x2},
-	{0x110a6, 0x7},
-	{0x110a7, 0x6},
-	{0x120a0, 0x0},
-	{0x120a1, 0x1},
-	{0x120a2, 0x3},
-	{0x120a3, 0x2},
-	{0x120a4, 0x5},
-	{0x120a5, 0x4},
-	{0x120a6, 0x7},
-	{0x120a7, 0x6},
-	{0x130a0, 0x0},
-	{0x130a1, 0x1},
-	{0x130a2, 0x2},
-	{0x130a3, 0x3},
-	{0x130a4, 0x4},
-	{0x130a5, 0x5},
-	{0x130a6, 0x6},
-	{0x130a7, 0x7},
-	{0x1005f, 0x1ff},
-	{0x1015f, 0x1ff},
-	{0x1105f, 0x1ff},
-	{0x1115f, 0x1ff},
-	{0x1205f, 0x1ff},
-	{0x1215f, 0x1ff},
-	{0x1305f, 0x1ff},
-	{0x1315f, 0x1ff},
-	{0x11005f, 0x1ff},
-	{0x11015f, 0x1ff},
-	{0x11105f, 0x1ff},
-	{0x11115f, 0x1ff},
-	{0x11205f, 0x1ff},
-	{0x11215f, 0x1ff},
-	{0x11305f, 0x1ff},
-	{0x11315f, 0x1ff},
-	{0x21005f, 0x1ff},
-	{0x21015f, 0x1ff},
-	{0x21105f, 0x1ff},
-	{0x21115f, 0x1ff},
-	{0x21205f, 0x1ff},
-	{0x21215f, 0x1ff},
-	{0x21305f, 0x1ff},
-	{0x21315f, 0x1ff},
-	{0x55, 0x1ff},
-	{0x1055, 0x1ff},
-	{0x2055, 0x1ff},
-	{0x3055, 0x1ff},
-	{0x4055, 0x1ff},
-	{0x5055, 0x1ff},
-	{0x6055, 0x1ff},
-	{0x7055, 0x1ff},
-	{0x8055, 0x1ff},
-	{0x9055, 0x1ff},
-	{0x200c5, 0x19},
-	{0x1200c5, 0x7},
-	{0x2200c5, 0x7},
-	{0x2002e, 0x2},
-	{0x12002e, 0x2},
-	{0x22002e, 0x2},
-	{0x90204, 0x0},
-	{0x190204, 0x0},
-	{0x290204, 0x0},
-	{0x20024, 0x1ab},
-	{0x2003a, 0x0},
-	{0x120024, 0x1ab},
-	{0x2003a, 0x0},
-	{0x220024, 0x1ab},
-	{0x2003a, 0x0},
-	{0x20056, 0x3},
-	{0x120056, 0x3},
-	{0x220056, 0x3},
-	{0x1004d, 0xe00},
-	{0x1014d, 0xe00},
-	{0x1104d, 0xe00},
-	{0x1114d, 0xe00},
-	{0x1204d, 0xe00},
-	{0x1214d, 0xe00},
-	{0x1304d, 0xe00},
-	{0x1314d, 0xe00},
-	{0x11004d, 0xe00},
-	{0x11014d, 0xe00},
-	{0x11104d, 0xe00},
-	{0x11114d, 0xe00},
-	{0x11204d, 0xe00},
-	{0x11214d, 0xe00},
-	{0x11304d, 0xe00},
-	{0x11314d, 0xe00},
-	{0x21004d, 0xe00},
-	{0x21014d, 0xe00},
-	{0x21104d, 0xe00},
-	{0x21114d, 0xe00},
-	{0x21204d, 0xe00},
-	{0x21214d, 0xe00},
-	{0x21304d, 0xe00},
-	{0x21314d, 0xe00},
-	{0x10049, 0xeba},
-	{0x10149, 0xeba},
-	{0x11049, 0xeba},
-	{0x11149, 0xeba},
-	{0x12049, 0xeba},
-	{0x12149, 0xeba},
-	{0x13049, 0xeba},
-	{0x13149, 0xeba},
-	{0x110049, 0xeba},
-	{0x110149, 0xeba},
-	{0x111049, 0xeba},
-	{0x111149, 0xeba},
-	{0x112049, 0xeba},
-	{0x112149, 0xeba},
-	{0x113049, 0xeba},
-	{0x113149, 0xeba},
-	{0x210049, 0xeba},
-	{0x210149, 0xeba},
-	{0x211049, 0xeba},
-	{0x211149, 0xeba},
-	{0x212049, 0xeba},
-	{0x212149, 0xeba},
-	{0x213049, 0xeba},
-	{0x213149, 0xeba},
-	{0x43, 0x63},
-	{0x1043, 0x63},
-	{0x2043, 0x63},
-	{0x3043, 0x63},
-	{0x4043, 0x63},
-	{0x5043, 0x63},
-	{0x6043, 0x63},
-	{0x7043, 0x63},
-	{0x8043, 0x63},
-	{0x9043, 0x63},
-	{0x20018, 0x3},
-	{0x20075, 0x4},
-	{0x20050, 0x0},
-	{0x20008, 0x2ee},
-	{0x120008, 0x64},
-	{0x220008, 0x19},
-	{0x20088, 0x9},
-	{0x200b2, 0xdc},
-	{0x10043, 0x5a1},
-	{0x10143, 0x5a1},
-	{0x11043, 0x5a1},
-	{0x11143, 0x5a1},
-	{0x12043, 0x5a1},
-	{0x12143, 0x5a1},
-	{0x13043, 0x5a1},
-	{0x13143, 0x5a1},
-	{0x1200b2, 0xdc},
-	{0x110043, 0x5a1},
-	{0x110143, 0x5a1},
-	{0x111043, 0x5a1},
-	{0x111143, 0x5a1},
-	{0x112043, 0x5a1},
-	{0x112143, 0x5a1},
-	{0x113043, 0x5a1},
-	{0x113143, 0x5a1},
-	{0x2200b2, 0xdc},
-	{0x210043, 0x5a1},
-	{0x210143, 0x5a1},
-	{0x211043, 0x5a1},
-	{0x211143, 0x5a1},
-	{0x212043, 0x5a1},
-	{0x212143, 0x5a1},
-	{0x213043, 0x5a1},
-	{0x213143, 0x5a1},
-	{0x200fa, 0x1},
-	{0x1200fa, 0x1},
-	{0x2200fa, 0x1},
-	{0x20019, 0x1},
-	{0x120019, 0x1},
-	{0x220019, 0x1},
-	{0x200f0, 0x660},
-	{0x200f1, 0x0},
-	{0x200f2, 0x4444},
-	{0x200f3, 0x8888},
-	{0x200f4, 0x5665},
-	{0x200f5, 0x0},
-	{0x200f6, 0x0},
-	{0x200f7, 0xf000},
-	{0x20025, 0x0},
-	{0x2002d, 0x0},
-	{0x12002d, 0x0},
-	{0x22002d, 0x0},
-	{0x200c7, 0x21},
-	{0x1200c7, 0x21},
-	{0x2200c7, 0x21},
-	{0x200ca, 0x24},
-	{0x1200ca, 0x24},
-	{0x2200ca, 0x24},
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x1 },
+	{ 0x100a2, 0x2 },
+	{ 0x100a3, 0x3 },
+	{ 0x100a4, 0x4 },
+	{ 0x100a5, 0x5 },
+	{ 0x100a6, 0x6 },
+	{ 0x100a7, 0x7 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x1 },
+	{ 0x110a2, 0x3 },
+	{ 0x110a3, 0x4 },
+	{ 0x110a4, 0x5 },
+	{ 0x110a5, 0x2 },
+	{ 0x110a6, 0x7 },
+	{ 0x110a7, 0x6 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x1 },
+	{ 0x120a2, 0x3 },
+	{ 0x120a3, 0x2 },
+	{ 0x120a4, 0x5 },
+	{ 0x120a5, 0x4 },
+	{ 0x120a6, 0x7 },
+	{ 0x120a7, 0x6 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x1 },
+	{ 0x130a2, 0x2 },
+	{ 0x130a3, 0x3 },
+	{ 0x130a4, 0x4 },
+	{ 0x130a5, 0x5 },
+	{ 0x130a6, 0x6 },
+	{ 0x130a7, 0x7 },
+	{ 0x1005f, 0x1ff },
+	{ 0x1015f, 0x1ff },
+	{ 0x1105f, 0x1ff },
+	{ 0x1115f, 0x1ff },
+	{ 0x1205f, 0x1ff },
+	{ 0x1215f, 0x1ff },
+	{ 0x1305f, 0x1ff },
+	{ 0x1315f, 0x1ff },
+	{ 0x11005f, 0x1ff },
+	{ 0x11015f, 0x1ff },
+	{ 0x11105f, 0x1ff },
+	{ 0x11115f, 0x1ff },
+	{ 0x11205f, 0x1ff },
+	{ 0x11215f, 0x1ff },
+	{ 0x11305f, 0x1ff },
+	{ 0x11315f, 0x1ff },
+	{ 0x55, 0x1ff },
+	{ 0x1055, 0x1ff },
+	{ 0x2055, 0x1ff },
+	{ 0x3055, 0x1ff },
+	{ 0x4055, 0x1ff },
+	{ 0x5055, 0x1ff },
+	{ 0x6055, 0x1ff },
+	{ 0x7055, 0x1ff },
+	{ 0x8055, 0x1ff },
+	{ 0x9055, 0x1ff },
+	{ 0x200c5, 0x19 },
+	{ 0x1200c5, 0x7 },
+	{ 0x2002e, 0x2 },
+	{ 0x12002e, 0x2 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x20024, 0x1ab },
+	{ 0x2003a, 0x0 },
+	{ 0x120024, 0x1ab },
+	{ 0x2003a, 0x0 },
+	{ 0x20056, 0x3 },
+	{ 0x120056, 0x3 },
+	{ 0x1004d, 0xe00 },
+	{ 0x1014d, 0xe00 },
+	{ 0x1104d, 0xe00 },
+	{ 0x1114d, 0xe00 },
+	{ 0x1204d, 0xe00 },
+	{ 0x1214d, 0xe00 },
+	{ 0x1304d, 0xe00 },
+	{ 0x1314d, 0xe00 },
+	{ 0x11004d, 0xe00 },
+	{ 0x11014d, 0xe00 },
+	{ 0x11104d, 0xe00 },
+	{ 0x11114d, 0xe00 },
+	{ 0x11204d, 0xe00 },
+	{ 0x11214d, 0xe00 },
+	{ 0x11304d, 0xe00 },
+	{ 0x11314d, 0xe00 },
+	{ 0x10049, 0x69a },
+	{ 0x10149, 0x69a },
+	{ 0x11049, 0x69a },
+	{ 0x11149, 0x69a },
+	{ 0x12049, 0x69a },
+	{ 0x12149, 0x69a },
+	{ 0x13049, 0x69a },
+	{ 0x13149, 0x69a },
+	{ 0x110049, 0x69a },
+	{ 0x110149, 0x69a },
+	{ 0x111049, 0x69a },
+	{ 0x111149, 0x69a },
+	{ 0x112049, 0x69a },
+	{ 0x112149, 0x69a },
+	{ 0x113049, 0x69a },
+	{ 0x113149, 0x69a },
+	{ 0x43, 0xe7 },
+	{ 0x1043, 0xe7 },
+	{ 0x2043, 0xe7 },
+	{ 0x3043, 0xe7 },
+	{ 0x4043, 0xe7 },
+	{ 0x5043, 0xe7 },
+	{ 0x6043, 0xe7 },
+	{ 0x7043, 0xe7 },
+	{ 0x8043, 0xe7 },
+	{ 0x9043, 0xe7 },
+	{ 0x20018, 0x3 },
+	{ 0x20075, 0x4 },
+	{ 0x20050, 0x0 },
+	{ 0x20008, 0x2ee },
+	{ 0x120008, 0x64 },
+	{ 0x20088, 0x9 },
+	{ 0x200b2, 0xdc },
+	{ 0x10043, 0x5a1 },
+	{ 0x10143, 0x5a1 },
+	{ 0x11043, 0x5a1 },
+	{ 0x11143, 0x5a1 },
+	{ 0x12043, 0x5a1 },
+	{ 0x12143, 0x5a1 },
+	{ 0x13043, 0x5a1 },
+	{ 0x13143, 0x5a1 },
+	{ 0x1200b2, 0xdc },
+	{ 0x110043, 0x5a1 },
+	{ 0x110143, 0x5a1 },
+	{ 0x111043, 0x5a1 },
+	{ 0x111143, 0x5a1 },
+	{ 0x112043, 0x5a1 },
+	{ 0x112143, 0x5a1 },
+	{ 0x113043, 0x5a1 },
+	{ 0x113143, 0x5a1 },
+	{ 0x200fa, 0x1 },
+	{ 0x1200fa, 0x1 },
+	{ 0x20019, 0x1 },
+	{ 0x120019, 0x1 },
+	{ 0x200f0, 0x60 },
+	{ 0x200f1, 0x0 },
+	{ 0x200f2, 0x4444 },
+	{ 0x200f3, 0x8888 },
+	{ 0x200f4, 0x5565 },
+	{ 0x200f5, 0x0 },
+	{ 0x200f6, 0x0 },
+	{ 0x200f7, 0xf000 },
+	{ 0x20025, 0x0 },
+	{ 0x2002d, 0x0 },
+	{ 0x12002d, 0x0 },
+	{ 0x200c7, 0x21 },
+	{ 0x1200c7, 0x21 },
+	{ 0x200ca, 0x24 },
+	{ 0x1200ca, 0x24 },
 };
 
 /* ddr phy trained csr */
@@ -1044,757 +976,703 @@ struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
 
 /* P0 message block paremeter for training firmware */
 struct dram_cfg_param ddr_fsp0_cfg[] = {
-	{0xd0000, 0x0},
-	{0x54003, 0xbb8},
-	{0x54004, 0x2},
-	{0x54005, 0x2228},
-	{0x54006, 0x11},
-	{0x54008, 0x131f},
-	{0x54009, 0xc8},
-	{0x5400b, 0x2},
-	{0x5400d, 0x100},
-	{0x54012, 0x310},
-	{0x54019, 0x2dd4},
-	{0x5401a, 0x31},
-	{0x5401b, 0x4d66},
-	{0x5401c, 0x4d00},
-	{0x5401e, 0x16},
-	{0x5401f, 0x2dd4},
-	{0x54020, 0x31},
-	{0x54021, 0x4d66},
-	{0x54022, 0x4d00},
-	{0x54024, 0x16},
-	{0x5402b, 0x1000},
-	{0x5402c, 0x3},
-	{0x54032, 0xd400},
-	{0x54033, 0x312d},
-	{0x54034, 0x6600},
-	{0x54035, 0x4d},
-	{0x54036, 0x4d},
-	{0x54037, 0x1600},
-	{0x54038, 0xd400},
-	{0x54039, 0x312d},
-	{0x5403a, 0x6600},
-	{0x5403b, 0x4d},
-	{0x5403c, 0x4d},
-	{0x5403d, 0x1600},
-	{0xd0000, 0x1},
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x3028 },
+	{ 0x54006, 0x11 },
+	{ 0x54008, 0x131f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, 0x31 },
+	{ 0x5401b, 0x4d63 },
+	{ 0x5401c, 0x4d00 },
+	{ 0x5401e, 0x15 },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, 0x31 },
+	{ 0x54021, 0x4d63 },
+	{ 0x54022, 0x4d00 },
+	{ 0x54024, 0x15 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, 0x312d },
+	{ 0x54034, 0x6300 },
+	{ 0x54035, 0x4d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, 0x1500 },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, 0x312d },
+	{ 0x5403a, 0x6300 },
+	{ 0x5403b, 0x4d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, 0x1500 },
+	{ 0xd0000, 0x1 },
 };
 
 /* P1 message block paremeter for training firmware */
 struct dram_cfg_param ddr_fsp1_cfg[] = {
-	{0xd0000, 0x0},
-	{0x54002, 0x101},
-	{0x54003, 0x190},
-	{0x54004, 0x2},
-	{0x54005, 0x2228},
-	{0x54006, 0x11},
-	{0x54008, 0x121f},
-	{0x54009, 0xc8},
-	{0x5400b, 0x2},
-	{0x5400d, 0x100},
-	{0x54012, 0x310},
-	{0x54019, 0x84},
-	{0x5401a, 0x31},
-	{0x5401b, 0x4d66},
-	{0x5401c, 0x4d00},
-	{0x5401e, 0x16},
-	{0x5401f, 0x84},
-	{0x54020, 0x31},
-	{0x54021, 0x4d66},
-	{0x54022, 0x4d00},
-	{0x54024, 0x16},
-	{0x5402b, 0x1000},
-	{0x5402c, 0x3},
-	{0x54032, 0x8400},
-	{0x54033, 0x3100},
-	{0x54034, 0x6600},
-	{0x54035, 0x4d},
-	{0x54036, 0x4d},
-	{0x54037, 0x1600},
-	{0x54038, 0x8400},
-	{0x54039, 0x3100},
-	{0x5403a, 0x6600},
-	{0x5403b, 0x4d},
-	{0x5403c, 0x4d},
-	{0x5403d, 0x1600},
-	{0xd0000, 0x1},
-};
-
-/* P2 message block paremeter for training firmware */
-struct dram_cfg_param ddr_fsp2_cfg[] = {
-	{0xd0000, 0x0},
-	{0x54002, 0x102},
-	{0x54003, 0x64},
-	{0x54004, 0x2},
-	{0x54005, 0x2228},
-	{0x54006, 0x11},
-	{0x54008, 0x121f},
-	{0x54009, 0xc8},
-	{0x5400b, 0x2},
-	{0x5400d, 0x100},
-	{0x54012, 0x310},
-	{0x54019, 0x84},
-	{0x5401a, 0x31},
-	{0x5401b, 0x4d66},
-	{0x5401c, 0x4d00},
-	{0x5401e, 0x16},
-	{0x5401f, 0x84},
-	{0x54020, 0x31},
-	{0x54021, 0x4d66},
-	{0x54022, 0x4d00},
-	{0x54024, 0x16},
-	{0x5402b, 0x1000},
-	{0x5402c, 0x3},
-	{0x54032, 0x8400},
-	{0x54033, 0x3100},
-	{0x54034, 0x6600},
-	{0x54035, 0x4d},
-	{0x54036, 0x4d},
-	{0x54037, 0x1600},
-	{0x54038, 0x8400},
-	{0x54039, 0x3100},
-	{0x5403a, 0x6600},
-	{0x5403b, 0x4d},
-	{0x5403c, 0x4d},
-	{0x5403d, 0x1600},
-	{0xd0000, 0x1},
+	{ 0xd0000, 0x0 },
+	{ 0x54002, 0x101 },
+	{ 0x54003, 0x190 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x3028 },
+	{ 0x54006, 0x11 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, 0x31 },
+	{ 0x5401b, 0x4d66 },
+	{ 0x5401c, 0x4d00 },
+	{ 0x5401e, 0x16 },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, 0x31 },
+	{ 0x54021, 0x4d66 },
+	{ 0x54022, 0x4d00 },
+	{ 0x54024, 0x16 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, 0x3100 },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x4d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, 0x1600 },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, 0x3100 },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x4d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, 0x1600 },
+	{ 0xd0000, 0x1 },
 };
 
 /* P0 2D message block paremeter for training firmware */
 struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
-	{0xd0000, 0x0},
-	{0x54003, 0xbb8},
-	{0x54004, 0x2},
-	{0x54005, 0x2228},
-	{0x54006, 0x11},
-	{0x54008, 0x61},
-	{0x54009, 0xc8},
-	{0x5400b, 0x2},
-	{0x5400f, 0x100},
-	{0x54010, 0x1f7f},
-	{0x54012, 0x310},
-	{0x54019, 0x2dd4},
-	{0x5401a, 0x31},
-	{0x5401b, 0x4d66},
-	{0x5401c, 0x4d00},
-	{0x5401e, 0x16},
-	{0x5401f, 0x2dd4},
-	{0x54020, 0x31},
-	{0x54021, 0x4d66},
-	{0x54022, 0x4d00},
-	{0x54024, 0x16},
-	{0x5402b, 0x1000},
-	{0x5402c, 0x3},
-	{0x54032, 0xd400},
-	{0x54033, 0x312d},
-	{0x54034, 0x6600},
-	{0x54035, 0x4d},
-	{0x54036, 0x4d},
-	{0x54037, 0x1600},
-	{0x54038, 0xd400},
-	{0x54039, 0x312d},
-	{0x5403a, 0x6600},
-	{0x5403b, 0x4d},
-	{0x5403c, 0x4d},
-	{0x5403d, 0x1600},
+	{ 0xd0000, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, 0x3028 },
+	{ 0x54006, 0x11 },
+	{ 0x54008, 0x61 },
+	{ 0x54009, 0xc8 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400f, 0x100 },
+	{ 0x54010, 0x1f7f },
+	{ 0x54012, 0x310 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, 0x31 },
+	{ 0x5401b, 0x4d63 },
+	{ 0x5401c, 0x4d00 },
+	{ 0x5401e, 0x15 },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, 0x31 },
+	{ 0x54021, 0x4d63 },
+	{ 0x54022, 0x4d00 },
+	{ 0x54024, 0x15 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, 0x3 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, 0x312d },
+	{ 0x54034, 0x6300 },
+	{ 0x54035, 0x4d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, 0x1500 },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, 0x312d },
+	{ 0x5403a, 0x6300 },
+	{ 0x5403b, 0x4d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, 0x1500 },
 	{ 0xd0000, 0x1 },
 };
 
 /* DRAM PHY init engine image */
 struct dram_cfg_param ddr_phy_pie[] = {
-	{0xd0000, 0x0},
-	{0x90000, 0x10},
-	{0x90001, 0x400},
-	{0x90002, 0x10e},
-	{0x90003, 0x0},
-	{0x90004, 0x0},
-	{0x90005, 0x8},
-	{0x90029, 0xb},
-	{0x9002a, 0x480},
-	{0x9002b, 0x109},
-	{0x9002c, 0x8},
-	{0x9002d, 0x448},
-	{0x9002e, 0x139},
-	{0x9002f, 0x8},
-	{0x90030, 0x478},
-	{0x90031, 0x109},
-	{0x90032, 0x0},
-	{0x90033, 0xe8},
-	{0x90034, 0x109},
-	{0x90035, 0x2},
-	{0x90036, 0x10},
-	{0x90037, 0x139},
-	{0x90038, 0xf},
-	{0x90039, 0x7c0},
-	{0x9003a, 0x139},
-	{0x9003b, 0x44},
-	{0x9003c, 0x630},
-	{0x9003d, 0x159},
-	{0x9003e, 0x14f},
-	{0x9003f, 0x630},
-	{0x90040, 0x159},
-	{0x90041, 0x47},
-	{0x90042, 0x630},
-	{0x90043, 0x149},
-	{0x90044, 0x4f},
-	{0x90045, 0x630},
-	{0x90046, 0x179},
-	{0x90047, 0x8},
-	{0x90048, 0xe0},
-	{0x90049, 0x109},
-	{0x9004a, 0x0},
-	{0x9004b, 0x7c8},
-	{0x9004c, 0x109},
-	{0x9004d, 0x0},
-	{0x9004e, 0x1},
-	{0x9004f, 0x8},
-	{0x90050, 0x0},
-	{0x90051, 0x45a},
-	{0x90052, 0x9},
-	{0x90053, 0x0},
-	{0x90054, 0x448},
-	{0x90055, 0x109},
-	{0x90056, 0x40},
-	{0x90057, 0x630},
-	{0x90058, 0x179},
-	{0x90059, 0x1},
-	{0x9005a, 0x618},
-	{0x9005b, 0x109},
-	{0x9005c, 0x40c0},
-	{0x9005d, 0x630},
-	{0x9005e, 0x149},
-	{0x9005f, 0x8},
-	{0x90060, 0x4},
-	{0x90061, 0x48},
-	{0x90062, 0x4040},
-	{0x90063, 0x630},
-	{0x90064, 0x149},
-	{0x90065, 0x0},
-	{0x90066, 0x4},
-	{0x90067, 0x48},
-	{0x90068, 0x40},
-	{0x90069, 0x630},
-	{0x9006a, 0x149},
-	{0x9006b, 0x10},
-	{0x9006c, 0x4},
-	{0x9006d, 0x18},
-	{0x9006e, 0x0},
-	{0x9006f, 0x4},
-	{0x90070, 0x78},
-	{0x90071, 0x549},
-	{0x90072, 0x630},
-	{0x90073, 0x159},
-	{0x90074, 0xd49},
-	{0x90075, 0x630},
-	{0x90076, 0x159},
-	{0x90077, 0x94a},
-	{0x90078, 0x630},
-	{0x90079, 0x159},
-	{0x9007a, 0x441},
-	{0x9007b, 0x630},
-	{0x9007c, 0x149},
-	{0x9007d, 0x42},
-	{0x9007e, 0x630},
-	{0x9007f, 0x149},
-	{0x90080, 0x1},
-	{0x90081, 0x630},
-	{0x90082, 0x149},
-	{0x90083, 0x0},
-	{0x90084, 0xe0},
-	{0x90085, 0x109},
-	{0x90086, 0xa},
-	{0x90087, 0x10},
-	{0x90088, 0x109},
-	{0x90089, 0x9},
-	{0x9008a, 0x3c0},
-	{0x9008b, 0x149},
-	{0x9008c, 0x9},
-	{0x9008d, 0x3c0},
-	{0x9008e, 0x159},
-	{0x9008f, 0x18},
-	{0x90090, 0x10},
-	{0x90091, 0x109},
-	{0x90092, 0x0},
-	{0x90093, 0x3c0},
-	{0x90094, 0x109},
-	{0x90095, 0x18},
-	{0x90096, 0x4},
-	{0x90097, 0x48},
-	{0x90098, 0x18},
-	{0x90099, 0x4},
-	{0x9009a, 0x58},
-	{0x9009b, 0xa},
-	{0x9009c, 0x10},
-	{0x9009d, 0x109},
-	{0x9009e, 0x2},
-	{0x9009f, 0x10},
-	{0x900a0, 0x109},
-	{0x900a1, 0x5},
-	{0x900a2, 0x7c0},
-	{0x900a3, 0x109},
-	{0x900a4, 0x10},
-	{0x900a5, 0x10},
-	{0x900a6, 0x109},
-	{0x40000, 0x811},
-	{0x40020, 0x880},
-	{0x40040, 0x0},
-	{0x40060, 0x0},
-	{0x40001, 0x4008},
-	{0x40021, 0x83},
-	{0x40041, 0x4f},
-	{0x40061, 0x0},
-	{0x40002, 0x4040},
-	{0x40022, 0x83},
-	{0x40042, 0x51},
-	{0x40062, 0x0},
-	{0x40003, 0x811},
-	{0x40023, 0x880},
-	{0x40043, 0x0},
-	{0x40063, 0x0},
-	{0x40004, 0x720},
-	{0x40024, 0xf},
-	{0x40044, 0x1740},
-	{0x40064, 0x0},
-	{0x40005, 0x16},
-	{0x40025, 0x83},
-	{0x40045, 0x4b},
-	{0x40065, 0x0},
-	{0x40006, 0x716},
-	{0x40026, 0xf},
-	{0x40046, 0x2001},
-	{0x40066, 0x0},
-	{0x40007, 0x716},
-	{0x40027, 0xf},
-	{0x40047, 0x2800},
-	{0x40067, 0x0},
-	{0x40008, 0x716},
-	{0x40028, 0xf},
-	{0x40048, 0xf00},
-	{0x40068, 0x0},
-	{0x40009, 0x720},
-	{0x40029, 0xf},
-	{0x40049, 0x1400},
-	{0x40069, 0x0},
-	{0x4000a, 0xe08},
-	{0x4002a, 0xc15},
-	{0x4004a, 0x0},
-	{0x4006a, 0x0},
-	{0x4000b, 0x623},
-	{0x4002b, 0x15},
-	{0x4004b, 0x0},
-	{0x4006b, 0x0},
-	{0x4000c, 0x4028},
-	{0x4002c, 0x80},
-	{0x4004c, 0x0},
-	{0x4006c, 0x0},
-	{0x4000d, 0xe08},
-	{0x4002d, 0xc1a},
-	{0x4004d, 0x0},
-	{0x4006d, 0x0},
-	{0x4000e, 0x623},
-	{0x4002e, 0x1a},
-	{0x4004e, 0x0},
-	{0x4006e, 0x0},
-	{0x4000f, 0x4040},
-	{0x4002f, 0x80},
-	{0x4004f, 0x0},
-	{0x4006f, 0x0},
-	{0x40010, 0x2604},
-	{0x40030, 0x15},
-	{0x40050, 0x0},
-	{0x40070, 0x0},
-	{0x40011, 0x708},
-	{0x40031, 0x5},
-	{0x40051, 0x0},
-	{0x40071, 0x2002},
-	{0x40012, 0x8},
-	{0x40032, 0x80},
-	{0x40052, 0x0},
-	{0x40072, 0x0},
-	{0x40013, 0x2604},
-	{0x40033, 0x1a},
-	{0x40053, 0x0},
-	{0x40073, 0x0},
-	{0x40014, 0x708},
-	{0x40034, 0xa},
-	{0x40054, 0x0},
-	{0x40074, 0x2002},
-	{0x40015, 0x4040},
-	{0x40035, 0x80},
-	{0x40055, 0x0},
-	{0x40075, 0x0},
-	{0x40016, 0x60a},
-	{0x40036, 0x15},
-	{0x40056, 0x1200},
-	{0x40076, 0x0},
-	{0x40017, 0x61a},
-	{0x40037, 0x15},
-	{0x40057, 0x1300},
-	{0x40077, 0x0},
-	{0x40018, 0x60a},
-	{0x40038, 0x1a},
-	{0x40058, 0x1200},
-	{0x40078, 0x0},
-	{0x40019, 0x642},
-	{0x40039, 0x1a},
-	{0x40059, 0x1300},
-	{0x40079, 0x0},
-	{0x4001a, 0x4808},
-	{0x4003a, 0x880},
-	{0x4005a, 0x0},
-	{0x4007a, 0x0},
-	{0x900a7, 0x0},
-	{0x900a8, 0x790},
-	{0x900a9, 0x11a},
-	{0x900aa, 0x8},
-	{0x900ab, 0x7aa},
-	{0x900ac, 0x2a},
-	{0x900ad, 0x10},
-	{0x900ae, 0x7b2},
-	{0x900af, 0x2a},
-	{0x900b0, 0x0},
-	{0x900b1, 0x7c8},
-	{0x900b2, 0x109},
-	{0x900b3, 0x10},
-	{0x900b4, 0x2a8},
-	{0x900b5, 0x129},
-	{0x900b6, 0x8},
-	{0x900b7, 0x370},
-	{0x900b8, 0x129},
-	{0x900b9, 0xa},
-	{0x900ba, 0x3c8},
-	{0x900bb, 0x1a9},
-	{0x900bc, 0xc},
-	{0x900bd, 0x408},
-	{0x900be, 0x199},
-	{0x900bf, 0x14},
-	{0x900c0, 0x790},
-	{0x900c1, 0x11a},
-	{0x900c2, 0x8},
-	{0x900c3, 0x4},
-	{0x900c4, 0x18},
-	{0x900c5, 0xe},
-	{0x900c6, 0x408},
-	{0x900c7, 0x199},
-	{0x900c8, 0x8},
-	{0x900c9, 0x8568},
-	{0x900ca, 0x108},
-	{0x900cb, 0x18},
-	{0x900cc, 0x790},
-	{0x900cd, 0x16a},
-	{0x900ce, 0x8},
-	{0x900cf, 0x1d8},
-	{0x900d0, 0x169},
-	{0x900d1, 0x10},
-	{0x900d2, 0x8558},
-	{0x900d3, 0x168},
-	{0x900d4, 0x70},
-	{0x900d5, 0x788},
-	{0x900d6, 0x16a},
-	{0x900d7, 0x1ff8},
-	{0x900d8, 0x85a8},
-	{0x900d9, 0x1e8},
-	{0x900da, 0x50},
-	{0x900db, 0x798},
-	{0x900dc, 0x16a},
-	{0x900dd, 0x60},
-	{0x900de, 0x7a0},
-	{0x900df, 0x16a},
-	{0x900e0, 0x8},
-	{0x900e1, 0x8310},
-	{0x900e2, 0x168},
-	{0x900e3, 0x8},
-	{0x900e4, 0xa310},
-	{0x900e5, 0x168},
-	{0x900e6, 0xa},
-	{0x900e7, 0x408},
-	{0x900e8, 0x169},
-	{0x900e9, 0x6e},
-	{0x900ea, 0x0},
-	{0x900eb, 0x68},
-	{0x900ec, 0x0},
-	{0x900ed, 0x408},
-	{0x900ee, 0x169},
-	{0x900ef, 0x0},
-	{0x900f0, 0x8310},
-	{0x900f1, 0x168},
-	{0x900f2, 0x0},
-	{0x900f3, 0xa310},
-	{0x900f4, 0x168},
-	{0x900f5, 0x1ff8},
-	{0x900f6, 0x85a8},
-	{0x900f7, 0x1e8},
-	{0x900f8, 0x68},
-	{0x900f9, 0x798},
-	{0x900fa, 0x16a},
-	{0x900fb, 0x78},
-	{0x900fc, 0x7a0},
-	{0x900fd, 0x16a},
-	{0x900fe, 0x68},
-	{0x900ff, 0x790},
-	{0x90100, 0x16a},
-	{0x90101, 0x8},
-	{0x90102, 0x8b10},
-	{0x90103, 0x168},
-	{0x90104, 0x8},
-	{0x90105, 0xab10},
-	{0x90106, 0x168},
-	{0x90107, 0xa},
-	{0x90108, 0x408},
-	{0x90109, 0x169},
-	{0x9010a, 0x58},
-	{0x9010b, 0x0},
-	{0x9010c, 0x68},
-	{0x9010d, 0x0},
-	{0x9010e, 0x408},
-	{0x9010f, 0x169},
-	{0x90110, 0x0},
-	{0x90111, 0x8b10},
-	{0x90112, 0x168},
-	{0x90113, 0x0},
-	{0x90114, 0xab10},
-	{0x90115, 0x168},
-	{0x90116, 0x0},
-	{0x90117, 0x1d8},
-	{0x90118, 0x169},
-	{0x90119, 0x80},
-	{0x9011a, 0x790},
-	{0x9011b, 0x16a},
-	{0x9011c, 0x18},
-	{0x9011d, 0x7aa},
-	{0x9011e, 0x6a},
-	{0x9011f, 0xa},
-	{0x90120, 0x0},
-	{0x90121, 0x1e9},
-	{0x90122, 0x8},
-	{0x90123, 0x8080},
-	{0x90124, 0x108},
-	{0x90125, 0xf},
-	{0x90126, 0x408},
-	{0x90127, 0x169},
-	{0x90128, 0xc},
-	{0x90129, 0x0},
-	{0x9012a, 0x68},
-	{0x9012b, 0x9},
-	{0x9012c, 0x0},
-	{0x9012d, 0x1a9},
-	{0x9012e, 0x0},
-	{0x9012f, 0x408},
-	{0x90130, 0x169},
-	{0x90131, 0x0},
-	{0x90132, 0x8080},
-	{0x90133, 0x108},
-	{0x90134, 0x8},
-	{0x90135, 0x7aa},
-	{0x90136, 0x6a},
-	{0x90137, 0x0},
-	{0x90138, 0x8568},
-	{0x90139, 0x108},
-	{0x9013a, 0xb7},
-	{0x9013b, 0x790},
-	{0x9013c, 0x16a},
-	{0x9013d, 0x1f},
-	{0x9013e, 0x0},
-	{0x9013f, 0x68},
-	{0x90140, 0x8},
-	{0x90141, 0x8558},
-	{0x90142, 0x168},
-	{0x90143, 0xf},
-	{0x90144, 0x408},
-	{0x90145, 0x169},
-	{0x90146, 0xc},
-	{0x90147, 0x0},
-	{0x90148, 0x68},
-	{0x90149, 0x0},
-	{0x9014a, 0x408},
-	{0x9014b, 0x169},
-	{0x9014c, 0x0},
-	{0x9014d, 0x8558},
-	{0x9014e, 0x168},
-	{0x9014f, 0x8},
-	{0x90150, 0x3c8},
-	{0x90151, 0x1a9},
-	{0x90152, 0x3},
-	{0x90153, 0x370},
-	{0x90154, 0x129},
-	{0x90155, 0x20},
-	{0x90156, 0x2aa},
-	{0x90157, 0x9},
-	{0x90158, 0x0},
-	{0x90159, 0x400},
-	{0x9015a, 0x10e},
-	{0x9015b, 0x8},
-	{0x9015c, 0xe8},
-	{0x9015d, 0x109},
-	{0x9015e, 0x0},
-	{0x9015f, 0x8140},
-	{0x90160, 0x10c},
-	{0x90161, 0x10},
-	{0x90162, 0x8138},
-	{0x90163, 0x10c},
-	{0x90164, 0x8},
-	{0x90165, 0x7c8},
-	{0x90166, 0x101},
-	{0x90167, 0x8},
-	{0x90168, 0x0},
-	{0x90169, 0x8},
-	{0x9016a, 0x8},
-	{0x9016b, 0x448},
-	{0x9016c, 0x109},
-	{0x9016d, 0xf},
-	{0x9016e, 0x7c0},
-	{0x9016f, 0x109},
-	{0x90170, 0x0},
-	{0x90171, 0xe8},
-	{0x90172, 0x109},
-	{0x90173, 0x47},
-	{0x90174, 0x630},
-	{0x90175, 0x109},
-	{0x90176, 0x8},
-	{0x90177, 0x618},
-	{0x90178, 0x109},
-	{0x90179, 0x8},
-	{0x9017a, 0xe0},
-	{0x9017b, 0x109},
-	{0x9017c, 0x0},
-	{0x9017d, 0x7c8},
-	{0x9017e, 0x109},
-	{0x9017f, 0x8},
-	{0x90180, 0x8140},
-	{0x90181, 0x10c},
-	{0x90182, 0x0},
-	{0x90183, 0x1},
-	{0x90184, 0x8},
-	{0x90185, 0x8},
-	{0x90186, 0x4},
-	{0x90187, 0x8},
-	{0x90188, 0x8},
-	{0x90189, 0x7c8},
-	{0x9018a, 0x101},
-	{0x90006, 0x0},
-	{0x90007, 0x0},
-	{0x90008, 0x8},
-	{0x90009, 0x0},
-	{0x9000a, 0x0},
-	{0x9000b, 0x0},
-	{0xd00e7, 0x400},
-	{0x90017, 0x0},
-	{0x9001f, 0x2a},
-	{0x90026, 0x6a},
-	{0x400d0, 0x0},
-	{0x400d1, 0x101},
-	{0x400d2, 0x105},
-	{0x400d3, 0x107},
-	{0x400d4, 0x10f},
-	{0x400d5, 0x202},
-	{0x400d6, 0x20a},
-	{0x400d7, 0x20b},
-	{0x2003a, 0x2},
-	{0x2000b, 0x5d},
-	{0x2000c, 0xbb},
-	{0x2000d, 0x753},
-	{0x2000e, 0x2c},
-	{0x12000b, 0xc},
-	{0x12000c, 0x19},
-	{0x12000d, 0xfa},
-	{0x12000e, 0x10},
-	{0x22000b, 0x3},
-	{0x22000c, 0x6},
-	{0x22000d, 0x3e},
-	{0x22000e, 0x10},
-	{0x9000c, 0x0},
-	{0x9000d, 0x173},
-	{0x9000e, 0x60},
-	{0x9000f, 0x6110},
-	{0x90010, 0x2152},
-	{0x90011, 0xdfbd},
-	{0x90012, 0x60},
-	{0x90013, 0x6152},
-	{0x20010, 0x5a},
-	{0x20011, 0x3},
-	{0x120010, 0x5a},
-	{0x120011, 0x3},
-	{0x220010, 0x5a},
-	{0x220011, 0x3},
-	{0x40080, 0xe0},
-	{0x40081, 0x12},
-	{0x40082, 0xe0},
-	{0x40083, 0x12},
-	{0x40084, 0xe0},
-	{0x40085, 0x12},
-	{0x140080, 0xe0},
-	{0x140081, 0x12},
-	{0x140082, 0xe0},
-	{0x140083, 0x12},
-	{0x140084, 0xe0},
-	{0x140085, 0x12},
-	{0x240080, 0xe0},
-	{0x240081, 0x12},
-	{0x240082, 0xe0},
-	{0x240083, 0x12},
-	{0x240084, 0xe0},
-	{0x240085, 0x12},
-	{0x400fd, 0xf},
-	{0x10011, 0x1},
-	{0x10012, 0x1},
-	{0x10013, 0x180},
-	{0x10018, 0x1},
-	{0x10002, 0x6209},
-	{0x100b2, 0x1},
-	{0x101b4, 0x1},
-	{0x102b4, 0x1},
-	{0x103b4, 0x1},
-	{0x104b4, 0x1},
-	{0x105b4, 0x1},
-	{0x106b4, 0x1},
-	{0x107b4, 0x1},
-	{0x108b4, 0x1},
-	{0x11011, 0x1},
-	{0x11012, 0x1},
-	{0x11013, 0x180},
-	{0x11018, 0x1},
-	{0x11002, 0x6209},
-	{0x110b2, 0x1},
-	{0x111b4, 0x1},
-	{0x112b4, 0x1},
-	{0x113b4, 0x1},
-	{0x114b4, 0x1},
-	{0x115b4, 0x1},
-	{0x116b4, 0x1},
-	{0x117b4, 0x1},
-	{0x118b4, 0x1},
-	{0x12011, 0x1},
-	{0x12012, 0x1},
-	{0x12013, 0x180},
-	{0x12018, 0x1},
-	{0x12002, 0x6209},
-	{0x120b2, 0x1},
-	{0x121b4, 0x1},
-	{0x122b4, 0x1},
-	{0x123b4, 0x1},
-	{0x124b4, 0x1},
-	{0x125b4, 0x1},
-	{0x126b4, 0x1},
-	{0x127b4, 0x1},
-	{0x128b4, 0x1},
-	{0x13011, 0x1},
-	{0x13012, 0x1},
-	{0x13013, 0x180},
-	{0x13018, 0x1},
-	{0x13002, 0x6209},
-	{0x130b2, 0x1},
-	{0x131b4, 0x1},
-	{0x132b4, 0x1},
-	{0x133b4, 0x1},
-	{0x134b4, 0x1},
-	{0x135b4, 0x1},
-	{0x136b4, 0x1},
-	{0x137b4, 0x1},
-	{0x138b4, 0x1},
-	{0x2003a, 0x2},
-	{0xc0080, 0x2},
-	{0xd0000, 0x1}
+	{ 0xd0000, 0x0 },
+	{ 0x90000, 0x10 },
+	{ 0x90001, 0x400 },
+	{ 0x90002, 0x10e },
+	{ 0x90003, 0x0 },
+	{ 0x90004, 0x0 },
+	{ 0x90005, 0x8 },
+	{ 0x90029, 0xb },
+	{ 0x9002a, 0x480 },
+	{ 0x9002b, 0x109 },
+	{ 0x9002c, 0x8 },
+	{ 0x9002d, 0x448 },
+	{ 0x9002e, 0x139 },
+	{ 0x9002f, 0x8 },
+	{ 0x90030, 0x478 },
+	{ 0x90031, 0x109 },
+	{ 0x90032, 0x0 },
+	{ 0x90033, 0xe8 },
+	{ 0x90034, 0x109 },
+	{ 0x90035, 0x2 },
+	{ 0x90036, 0x10 },
+	{ 0x90037, 0x139 },
+	{ 0x90038, 0xf },
+	{ 0x90039, 0x7c0 },
+	{ 0x9003a, 0x139 },
+	{ 0x9003b, 0x44 },
+	{ 0x9003c, 0x630 },
+	{ 0x9003d, 0x159 },
+	{ 0x9003e, 0x14f },
+	{ 0x9003f, 0x630 },
+	{ 0x90040, 0x159 },
+	{ 0x90041, 0x47 },
+	{ 0x90042, 0x630 },
+	{ 0x90043, 0x149 },
+	{ 0x90044, 0x4f },
+	{ 0x90045, 0x630 },
+	{ 0x90046, 0x179 },
+	{ 0x90047, 0x8 },
+	{ 0x90048, 0xe0 },
+	{ 0x90049, 0x109 },
+	{ 0x9004a, 0x0 },
+	{ 0x9004b, 0x7c8 },
+	{ 0x9004c, 0x109 },
+	{ 0x9004d, 0x0 },
+	{ 0x9004e, 0x1 },
+	{ 0x9004f, 0x8 },
+	{ 0x90050, 0x0 },
+	{ 0x90051, 0x45a },
+	{ 0x90052, 0x9 },
+	{ 0x90053, 0x0 },
+	{ 0x90054, 0x448 },
+	{ 0x90055, 0x109 },
+	{ 0x90056, 0x40 },
+	{ 0x90057, 0x630 },
+	{ 0x90058, 0x179 },
+	{ 0x90059, 0x1 },
+	{ 0x9005a, 0x618 },
+	{ 0x9005b, 0x109 },
+	{ 0x9005c, 0x40c0 },
+	{ 0x9005d, 0x630 },
+	{ 0x9005e, 0x149 },
+	{ 0x9005f, 0x8 },
+	{ 0x90060, 0x4 },
+	{ 0x90061, 0x48 },
+	{ 0x90062, 0x4040 },
+	{ 0x90063, 0x630 },
+	{ 0x90064, 0x149 },
+	{ 0x90065, 0x0 },
+	{ 0x90066, 0x4 },
+	{ 0x90067, 0x48 },
+	{ 0x90068, 0x40 },
+	{ 0x90069, 0x630 },
+	{ 0x9006a, 0x149 },
+	{ 0x9006b, 0x10 },
+	{ 0x9006c, 0x4 },
+	{ 0x9006d, 0x18 },
+	{ 0x9006e, 0x0 },
+	{ 0x9006f, 0x4 },
+	{ 0x90070, 0x78 },
+	{ 0x90071, 0x549 },
+	{ 0x90072, 0x630 },
+	{ 0x90073, 0x159 },
+	{ 0x90074, 0xd49 },
+	{ 0x90075, 0x630 },
+	{ 0x90076, 0x159 },
+	{ 0x90077, 0x94a },
+	{ 0x90078, 0x630 },
+	{ 0x90079, 0x159 },
+	{ 0x9007a, 0x441 },
+	{ 0x9007b, 0x630 },
+	{ 0x9007c, 0x149 },
+	{ 0x9007d, 0x42 },
+	{ 0x9007e, 0x630 },
+	{ 0x9007f, 0x149 },
+	{ 0x90080, 0x1 },
+	{ 0x90081, 0x630 },
+	{ 0x90082, 0x149 },
+	{ 0x90083, 0x0 },
+	{ 0x90084, 0xe0 },
+	{ 0x90085, 0x109 },
+	{ 0x90086, 0xa },
+	{ 0x90087, 0x10 },
+	{ 0x90088, 0x109 },
+	{ 0x90089, 0x9 },
+	{ 0x9008a, 0x3c0 },
+	{ 0x9008b, 0x149 },
+	{ 0x9008c, 0x9 },
+	{ 0x9008d, 0x3c0 },
+	{ 0x9008e, 0x159 },
+	{ 0x9008f, 0x18 },
+	{ 0x90090, 0x10 },
+	{ 0x90091, 0x109 },
+	{ 0x90092, 0x0 },
+	{ 0x90093, 0x3c0 },
+	{ 0x90094, 0x109 },
+	{ 0x90095, 0x18 },
+	{ 0x90096, 0x4 },
+	{ 0x90097, 0x48 },
+	{ 0x90098, 0x18 },
+	{ 0x90099, 0x4 },
+	{ 0x9009a, 0x58 },
+	{ 0x9009b, 0xa },
+	{ 0x9009c, 0x10 },
+	{ 0x9009d, 0x109 },
+	{ 0x9009e, 0x2 },
+	{ 0x9009f, 0x10 },
+	{ 0x900a0, 0x109 },
+	{ 0x900a1, 0x5 },
+	{ 0x900a2, 0x7c0 },
+	{ 0x900a3, 0x109 },
+	{ 0x900a4, 0x10 },
+	{ 0x900a5, 0x10 },
+	{ 0x900a6, 0x109 },
+	{ 0x40000, 0x811 },
+	{ 0x40020, 0x880 },
+	{ 0x40040, 0x0 },
+	{ 0x40060, 0x0 },
+	{ 0x40001, 0x4008 },
+	{ 0x40021, 0x83 },
+	{ 0x40041, 0x4f },
+	{ 0x40061, 0x0 },
+	{ 0x40002, 0x4040 },
+	{ 0x40022, 0x83 },
+	{ 0x40042, 0x51 },
+	{ 0x40062, 0x0 },
+	{ 0x40003, 0x811 },
+	{ 0x40023, 0x880 },
+	{ 0x40043, 0x0 },
+	{ 0x40063, 0x0 },
+	{ 0x40004, 0x720 },
+	{ 0x40024, 0xf },
+	{ 0x40044, 0x1740 },
+	{ 0x40064, 0x0 },
+	{ 0x40005, 0x16 },
+	{ 0x40025, 0x83 },
+	{ 0x40045, 0x4b },
+	{ 0x40065, 0x0 },
+	{ 0x40006, 0x716 },
+	{ 0x40026, 0xf },
+	{ 0x40046, 0x2001 },
+	{ 0x40066, 0x0 },
+	{ 0x40007, 0x716 },
+	{ 0x40027, 0xf },
+	{ 0x40047, 0x2800 },
+	{ 0x40067, 0x0 },
+	{ 0x40008, 0x716 },
+	{ 0x40028, 0xf },
+	{ 0x40048, 0xf00 },
+	{ 0x40068, 0x0 },
+	{ 0x40009, 0x720 },
+	{ 0x40029, 0xf },
+	{ 0x40049, 0x1400 },
+	{ 0x40069, 0x0 },
+	{ 0x4000a, 0xe08 },
+	{ 0x4002a, 0xc15 },
+	{ 0x4004a, 0x0 },
+	{ 0x4006a, 0x0 },
+	{ 0x4000b, 0x623 },
+	{ 0x4002b, 0x15 },
+	{ 0x4004b, 0x0 },
+	{ 0x4006b, 0x0 },
+	{ 0x4000c, 0x4028 },
+	{ 0x4002c, 0x80 },
+	{ 0x4004c, 0x0 },
+	{ 0x4006c, 0x0 },
+	{ 0x4000d, 0xe08 },
+	{ 0x4002d, 0xc1a },
+	{ 0x4004d, 0x0 },
+	{ 0x4006d, 0x0 },
+	{ 0x4000e, 0x623 },
+	{ 0x4002e, 0x1a },
+	{ 0x4004e, 0x0 },
+	{ 0x4006e, 0x0 },
+	{ 0x4000f, 0x4040 },
+	{ 0x4002f, 0x80 },
+	{ 0x4004f, 0x0 },
+	{ 0x4006f, 0x0 },
+	{ 0x40010, 0x2604 },
+	{ 0x40030, 0x15 },
+	{ 0x40050, 0x0 },
+	{ 0x40070, 0x0 },
+	{ 0x40011, 0x708 },
+	{ 0x40031, 0x5 },
+	{ 0x40051, 0x0 },
+	{ 0x40071, 0x2002 },
+	{ 0x40012, 0x8 },
+	{ 0x40032, 0x80 },
+	{ 0x40052, 0x0 },
+	{ 0x40072, 0x0 },
+	{ 0x40013, 0x2604 },
+	{ 0x40033, 0x1a },
+	{ 0x40053, 0x0 },
+	{ 0x40073, 0x0 },
+	{ 0x40014, 0x708 },
+	{ 0x40034, 0xa },
+	{ 0x40054, 0x0 },
+	{ 0x40074, 0x2002 },
+	{ 0x40015, 0x4040 },
+	{ 0x40035, 0x80 },
+	{ 0x40055, 0x0 },
+	{ 0x40075, 0x0 },
+	{ 0x40016, 0x60a },
+	{ 0x40036, 0x15 },
+	{ 0x40056, 0x1200 },
+	{ 0x40076, 0x0 },
+	{ 0x40017, 0x61a },
+	{ 0x40037, 0x15 },
+	{ 0x40057, 0x1300 },
+	{ 0x40077, 0x0 },
+	{ 0x40018, 0x60a },
+	{ 0x40038, 0x1a },
+	{ 0x40058, 0x1200 },
+	{ 0x40078, 0x0 },
+	{ 0x40019, 0x642 },
+	{ 0x40039, 0x1a },
+	{ 0x40059, 0x1300 },
+	{ 0x40079, 0x0 },
+	{ 0x4001a, 0x4808 },
+	{ 0x4003a, 0x880 },
+	{ 0x4005a, 0x0 },
+	{ 0x4007a, 0x0 },
+	{ 0x900a7, 0x0 },
+	{ 0x900a8, 0x790 },
+	{ 0x900a9, 0x11a },
+	{ 0x900aa, 0x8 },
+	{ 0x900ab, 0x7aa },
+	{ 0x900ac, 0x2a },
+	{ 0x900ad, 0x10 },
+	{ 0x900ae, 0x7b2 },
+	{ 0x900af, 0x2a },
+	{ 0x900b0, 0x0 },
+	{ 0x900b1, 0x7c8 },
+	{ 0x900b2, 0x109 },
+	{ 0x900b3, 0x10 },
+	{ 0x900b4, 0x2a8 },
+	{ 0x900b5, 0x129 },
+	{ 0x900b6, 0x8 },
+	{ 0x900b7, 0x370 },
+	{ 0x900b8, 0x129 },
+	{ 0x900b9, 0xa },
+	{ 0x900ba, 0x3c8 },
+	{ 0x900bb, 0x1a9 },
+	{ 0x900bc, 0xc },
+	{ 0x900bd, 0x408 },
+	{ 0x900be, 0x199 },
+	{ 0x900bf, 0x14 },
+	{ 0x900c0, 0x790 },
+	{ 0x900c1, 0x11a },
+	{ 0x900c2, 0x8 },
+	{ 0x900c3, 0x4 },
+	{ 0x900c4, 0x18 },
+	{ 0x900c5, 0xe },
+	{ 0x900c6, 0x408 },
+	{ 0x900c7, 0x199 },
+	{ 0x900c8, 0x8 },
+	{ 0x900c9, 0x8568 },
+	{ 0x900ca, 0x108 },
+	{ 0x900cb, 0x18 },
+	{ 0x900cc, 0x790 },
+	{ 0x900cd, 0x16a },
+	{ 0x900ce, 0x8 },
+	{ 0x900cf, 0x1d8 },
+	{ 0x900d0, 0x169 },
+	{ 0x900d1, 0x10 },
+	{ 0x900d2, 0x8558 },
+	{ 0x900d3, 0x168 },
+	{ 0x900d4, 0x70 },
+	{ 0x900d5, 0x788 },
+	{ 0x900d6, 0x16a },
+	{ 0x900d7, 0x1ff8 },
+	{ 0x900d8, 0x85a8 },
+	{ 0x900d9, 0x1e8 },
+	{ 0x900da, 0x50 },
+	{ 0x900db, 0x798 },
+	{ 0x900dc, 0x16a },
+	{ 0x900dd, 0x60 },
+	{ 0x900de, 0x7a0 },
+	{ 0x900df, 0x16a },
+	{ 0x900e0, 0x8 },
+	{ 0x900e1, 0x8310 },
+	{ 0x900e2, 0x168 },
+	{ 0x900e3, 0x8 },
+	{ 0x900e4, 0xa310 },
+	{ 0x900e5, 0x168 },
+	{ 0x900e6, 0xa },
+	{ 0x900e7, 0x408 },
+	{ 0x900e8, 0x169 },
+	{ 0x900e9, 0x6e },
+	{ 0x900ea, 0x0 },
+	{ 0x900eb, 0x68 },
+	{ 0x900ec, 0x0 },
+	{ 0x900ed, 0x408 },
+	{ 0x900ee, 0x169 },
+	{ 0x900ef, 0x0 },
+	{ 0x900f0, 0x8310 },
+	{ 0x900f1, 0x168 },
+	{ 0x900f2, 0x0 },
+	{ 0x900f3, 0xa310 },
+	{ 0x900f4, 0x168 },
+	{ 0x900f5, 0x1ff8 },
+	{ 0x900f6, 0x85a8 },
+	{ 0x900f7, 0x1e8 },
+	{ 0x900f8, 0x68 },
+	{ 0x900f9, 0x798 },
+	{ 0x900fa, 0x16a },
+	{ 0x900fb, 0x78 },
+	{ 0x900fc, 0x7a0 },
+	{ 0x900fd, 0x16a },
+	{ 0x900fe, 0x68 },
+	{ 0x900ff, 0x790 },
+	{ 0x90100, 0x16a },
+	{ 0x90101, 0x8 },
+	{ 0x90102, 0x8b10 },
+	{ 0x90103, 0x168 },
+	{ 0x90104, 0x8 },
+	{ 0x90105, 0xab10 },
+	{ 0x90106, 0x168 },
+	{ 0x90107, 0xa },
+	{ 0x90108, 0x408 },
+	{ 0x90109, 0x169 },
+	{ 0x9010a, 0x58 },
+	{ 0x9010b, 0x0 },
+	{ 0x9010c, 0x68 },
+	{ 0x9010d, 0x0 },
+	{ 0x9010e, 0x408 },
+	{ 0x9010f, 0x169 },
+	{ 0x90110, 0x0 },
+	{ 0x90111, 0x8b10 },
+	{ 0x90112, 0x168 },
+	{ 0x90113, 0x0 },
+	{ 0x90114, 0xab10 },
+	{ 0x90115, 0x168 },
+	{ 0x90116, 0x0 },
+	{ 0x90117, 0x1d8 },
+	{ 0x90118, 0x169 },
+	{ 0x90119, 0x80 },
+	{ 0x9011a, 0x790 },
+	{ 0x9011b, 0x16a },
+	{ 0x9011c, 0x18 },
+	{ 0x9011d, 0x7aa },
+	{ 0x9011e, 0x6a },
+	{ 0x9011f, 0xa },
+	{ 0x90120, 0x0 },
+	{ 0x90121, 0x1e9 },
+	{ 0x90122, 0x8 },
+	{ 0x90123, 0x8080 },
+	{ 0x90124, 0x108 },
+	{ 0x90125, 0xf },
+	{ 0x90126, 0x408 },
+	{ 0x90127, 0x169 },
+	{ 0x90128, 0xc },
+	{ 0x90129, 0x0 },
+	{ 0x9012a, 0x68 },
+	{ 0x9012b, 0x9 },
+	{ 0x9012c, 0x0 },
+	{ 0x9012d, 0x1a9 },
+	{ 0x9012e, 0x0 },
+	{ 0x9012f, 0x408 },
+	{ 0x90130, 0x169 },
+	{ 0x90131, 0x0 },
+	{ 0x90132, 0x8080 },
+	{ 0x90133, 0x108 },
+	{ 0x90134, 0x8 },
+	{ 0x90135, 0x7aa },
+	{ 0x90136, 0x6a },
+	{ 0x90137, 0x0 },
+	{ 0x90138, 0x8568 },
+	{ 0x90139, 0x108 },
+	{ 0x9013a, 0xb7 },
+	{ 0x9013b, 0x790 },
+	{ 0x9013c, 0x16a },
+	{ 0x9013d, 0x1f },
+	{ 0x9013e, 0x0 },
+	{ 0x9013f, 0x68 },
+	{ 0x90140, 0x8 },
+	{ 0x90141, 0x8558 },
+	{ 0x90142, 0x168 },
+	{ 0x90143, 0xf },
+	{ 0x90144, 0x408 },
+	{ 0x90145, 0x169 },
+	{ 0x90146, 0xc },
+	{ 0x90147, 0x0 },
+	{ 0x90148, 0x68 },
+	{ 0x90149, 0x0 },
+	{ 0x9014a, 0x408 },
+	{ 0x9014b, 0x169 },
+	{ 0x9014c, 0x0 },
+	{ 0x9014d, 0x8558 },
+	{ 0x9014e, 0x168 },
+	{ 0x9014f, 0x8 },
+	{ 0x90150, 0x3c8 },
+	{ 0x90151, 0x1a9 },
+	{ 0x90152, 0x3 },
+	{ 0x90153, 0x370 },
+	{ 0x90154, 0x129 },
+	{ 0x90155, 0x20 },
+	{ 0x90156, 0x2aa },
+	{ 0x90157, 0x9 },
+	{ 0x90158, 0x0 },
+	{ 0x90159, 0x400 },
+	{ 0x9015a, 0x10e },
+	{ 0x9015b, 0x8 },
+	{ 0x9015c, 0xe8 },
+	{ 0x9015d, 0x109 },
+	{ 0x9015e, 0x0 },
+	{ 0x9015f, 0x8140 },
+	{ 0x90160, 0x10c },
+	{ 0x90161, 0x10 },
+	{ 0x90162, 0x8138 },
+	{ 0x90163, 0x10c },
+	{ 0x90164, 0x8 },
+	{ 0x90165, 0x7c8 },
+	{ 0x90166, 0x101 },
+	{ 0x90167, 0x8 },
+	{ 0x90168, 0x0 },
+	{ 0x90169, 0x8 },
+	{ 0x9016a, 0x8 },
+	{ 0x9016b, 0x448 },
+	{ 0x9016c, 0x109 },
+	{ 0x9016d, 0xf },
+	{ 0x9016e, 0x7c0 },
+	{ 0x9016f, 0x109 },
+	{ 0x90170, 0x0 },
+	{ 0x90171, 0xe8 },
+	{ 0x90172, 0x109 },
+	{ 0x90173, 0x47 },
+	{ 0x90174, 0x630 },
+	{ 0x90175, 0x109 },
+	{ 0x90176, 0x8 },
+	{ 0x90177, 0x618 },
+	{ 0x90178, 0x109 },
+	{ 0x90179, 0x8 },
+	{ 0x9017a, 0xe0 },
+	{ 0x9017b, 0x109 },
+	{ 0x9017c, 0x0 },
+	{ 0x9017d, 0x7c8 },
+	{ 0x9017e, 0x109 },
+	{ 0x9017f, 0x8 },
+	{ 0x90180, 0x8140 },
+	{ 0x90181, 0x10c },
+	{ 0x90182, 0x0 },
+	{ 0x90183, 0x1 },
+	{ 0x90184, 0x8 },
+	{ 0x90185, 0x8 },
+	{ 0x90186, 0x4 },
+	{ 0x90187, 0x8 },
+	{ 0x90188, 0x8 },
+	{ 0x90189, 0x7c8 },
+	{ 0x9018a, 0x101 },
+	{ 0x90006, 0x0 },
+	{ 0x90007, 0x0 },
+	{ 0x90008, 0x8 },
+	{ 0x90009, 0x0 },
+	{ 0x9000a, 0x0 },
+	{ 0x9000b, 0x0 },
+	{ 0xd00e7, 0x400 },
+	{ 0x90017, 0x0 },
+	{ 0x9001f, 0x2a },
+	{ 0x90026, 0x6a },
+	{ 0x400d0, 0x0 },
+	{ 0x400d1, 0x101 },
+	{ 0x400d2, 0x105 },
+	{ 0x400d3, 0x107 },
+	{ 0x400d4, 0x10f },
+	{ 0x400d5, 0x202 },
+	{ 0x400d6, 0x20a },
+	{ 0x400d7, 0x20b },
+	{ 0x2003a, 0x2 },
+	{ 0x2000b, 0x5d },
+	{ 0x2000c, 0xbb },
+	{ 0x2000d, 0x753 },
+	{ 0x2000e, 0x2c },
+	{ 0x12000b, 0xc },
+	{ 0x12000c, 0x19 },
+	{ 0x12000d, 0xfa },
+	{ 0x12000e, 0x10 },
+	{ 0x9000c, 0x0 },
+	{ 0x9000d, 0x173 },
+	{ 0x9000e, 0x60 },
+	{ 0x9000f, 0x6110 },
+	{ 0x90010, 0x2152 },
+	{ 0x90011, 0xdfbd },
+	{ 0x90012, 0x60 },
+	{ 0x90013, 0x6152 },
+	{ 0x20010, 0x5a },
+	{ 0x20011, 0x3 },
+	{ 0x120010, 0x5a },
+	{ 0x120011, 0x3 },
+	{ 0x40080, 0xe0 },
+	{ 0x40081, 0x12 },
+	{ 0x40082, 0xe0 },
+	{ 0x40083, 0x12 },
+	{ 0x40084, 0xe0 },
+	{ 0x40085, 0x12 },
+	{ 0x140080, 0xe0 },
+	{ 0x140081, 0x12 },
+	{ 0x140082, 0xe0 },
+	{ 0x140083, 0x12 },
+	{ 0x140084, 0xe0 },
+	{ 0x140085, 0x12 },
+	{ 0x400fd, 0xf },
+	{ 0x10011, 0x1 },
+	{ 0x10012, 0x1 },
+	{ 0x10013, 0x180 },
+	{ 0x10018, 0x1 },
+	{ 0x10002, 0x6209 },
+	{ 0x100b2, 0x1 },
+	{ 0x101b4, 0x1 },
+	{ 0x102b4, 0x1 },
+	{ 0x103b4, 0x1 },
+	{ 0x104b4, 0x1 },
+	{ 0x105b4, 0x1 },
+	{ 0x106b4, 0x1 },
+	{ 0x107b4, 0x1 },
+	{ 0x108b4, 0x1 },
+	{ 0x11011, 0x1 },
+	{ 0x11012, 0x1 },
+	{ 0x11013, 0x180 },
+	{ 0x11018, 0x1 },
+	{ 0x11002, 0x6209 },
+	{ 0x110b2, 0x1 },
+	{ 0x111b4, 0x1 },
+	{ 0x112b4, 0x1 },
+	{ 0x113b4, 0x1 },
+	{ 0x114b4, 0x1 },
+	{ 0x115b4, 0x1 },
+	{ 0x116b4, 0x1 },
+	{ 0x117b4, 0x1 },
+	{ 0x118b4, 0x1 },
+	{ 0x12011, 0x1 },
+	{ 0x12012, 0x1 },
+	{ 0x12013, 0x180 },
+	{ 0x12018, 0x1 },
+	{ 0x12002, 0x6209 },
+	{ 0x120b2, 0x1 },
+	{ 0x121b4, 0x1 },
+	{ 0x122b4, 0x1 },
+	{ 0x123b4, 0x1 },
+	{ 0x124b4, 0x1 },
+	{ 0x125b4, 0x1 },
+	{ 0x126b4, 0x1 },
+	{ 0x127b4, 0x1 },
+	{ 0x128b4, 0x1 },
+	{ 0x13011, 0x1 },
+	{ 0x13012, 0x1 },
+	{ 0x13013, 0x180 },
+	{ 0x13018, 0x1 },
+	{ 0x13002, 0x6209 },
+	{ 0x130b2, 0x1 },
+	{ 0x131b4, 0x1 },
+	{ 0x132b4, 0x1 },
+	{ 0x133b4, 0x1 },
+	{ 0x134b4, 0x1 },
+	{ 0x135b4, 0x1 },
+	{ 0x136b4, 0x1 },
+	{ 0x137b4, 0x1 },
+	{ 0x138b4, 0x1 },
+	{ 0x2003a, 0x2 },
+	{ 0xc0080, 0x2 },
+	{ 0xd0000, 0x1 }
 };
 
 struct dram_fsp_msg ddr_dram_fsp_msg[] = {
@@ -1813,13 +1691,6 @@ struct dram_fsp_msg ddr_dram_fsp_msg[] = {
 		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
 	},
 	{
-		/* P2 100mts 1D */
-		.drate = 100,
-		.fw_type = FW_1D_IMAGE,
-		.fsp_cfg = ddr_fsp2_cfg,
-		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
-	},
-	{
 		/* P0 3000mts 2D */
 		.drate = 3000,
 		.fw_type = FW_2D_IMAGE,
@@ -1840,5 +1711,5 @@ struct dram_timing_info dram_timing = {
 	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
 	.ddrphy_pie = ddr_phy_pie,
 	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
-	.fsp_table = { 3000, 400, 100, },
+	.fsp_table = { 3000, 400, },
 };
diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c
index fea93278374..4ac430b29a9 100644
--- a/board/kontron/sl-mx8mm/sl-mx8mm.c
+++ b/board/kontron/sl-mx8mm/sl-mx8mm.c
@@ -4,10 +4,13 @@
  */
 
 #include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
+#include <asm/mach-imx/boot_mode.h>
 #include <efi.h>
 #include <efi_loader.h>
+#include <env_internal.h>
 #include <fdt_support.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
@@ -117,3 +120,45 @@ int board_init(void)
 {
 	return 0;
 }
+
+int board_late_init(void)
+{
+	if (!fdt_node_check_compatible(gd->fdt_blob, 0, "kontron,imx8mm-n802x-som") ||
+	    !fdt_node_check_compatible(gd->fdt_blob, 0, "kontron,imx8mm-osm-s")) {
+		env_set("som_type", "osm-s");
+		env_set("touch_rst_gpio", "111");
+	} else {
+		env_set("som_type", "sl");
+		env_set("touch_rst_gpio", "87");
+	}
+
+	return 0;
+}
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+	enum boot_device boot_dev = get_boot_device();
+
+	if (prio)
+		return ENVL_UNKNOWN;
+
+	/*
+	 * Make sure that the environment is loaded from
+	 * the MMC if we are running from SD card or eMMC.
+	 */
+	if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC) &&
+	    (boot_dev == SD1_BOOT || boot_dev == SD2_BOOT))
+		return ENVL_MMC;
+
+	if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+		return ENVL_SPI_FLASH;
+
+	return ENVL_NOWHERE;
+}
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
+#endif
diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.env b/board/kontron/sl-mx8mm/sl-mx8mm.env
new file mode 100644
index 00000000000..ef6fc1f3428
--- /dev/null
+++ b/board/kontron/sl-mx8mm/sl-mx8mm.env
@@ -0,0 +1,7 @@
+kernel_addr_r=0x42000000
+fdt_addr_r=0x48000000
+fdtoverlay_addr_r=0x49000000
+ramdisk_addr_r=0x48080000
+scriptaddr=0x40000000
+pxefile_addr_r=0x40100000
+dfu_alt_info=sf 0:0=flash-bin raw 0x400 0x1f0000
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index 09f81351dd4..25ee925ceb0 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -29,29 +29,17 @@ DECLARE_GLOBAL_DATA_PTR;
 
 enum {
 	BOARD_TYPE_KTN_N801X,
-	BOARD_TYPE_KTN_N801X_LVDS,
+	BOARD_TYPE_KTN_N802X,
 	BOARD_TYPE_MAX
 };
 
-#define GPIO_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 #define I2C_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
 
-#define TOUCH_RESET_GPIO	IMX_GPIO_NR(3, 23)
-
 static iomux_v3_cfg_t const i2c1_pads[] = {
 	IMX8MM_PAD_I2C1_SCL_I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION,
 	IMX8MM_PAD_I2C1_SDA_I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION
 };
 
-static iomux_v3_cfg_t const i2c2_pads[] = {
-	IMX8MM_PAD_I2C2_SCL_I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION,
-	IMX8MM_PAD_I2C2_SDA_I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL) | MUX_MODE_SION
-};
-
-static iomux_v3_cfg_t const touch_gpio[] = {
-	IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 | MUX_PAD_CTRL(GPIO_PAD_CTRL)
-};
-
 int spl_board_boot_device(enum boot_device boot_dev_spl)
 {
 	switch (boot_dev_spl) {
@@ -97,14 +85,12 @@ static void spl_dram_init(void)
 		dram_timing.ddrc_cfg[2].val = 0xa1080020;
 		dram_timing.ddrc_cfg[37].val = 0x1f;
 
-		dram_timing.fsp_msg[0].fsp_cfg[9].val = 0x110;
-		dram_timing.fsp_msg[0].fsp_cfg[21].val = 0x1;
-		dram_timing.fsp_msg[1].fsp_cfg[10].val = 0x110;
-		dram_timing.fsp_msg[1].fsp_cfg[22].val = 0x1;
+		dram_timing.fsp_msg[0].fsp_cfg[8].val = 0x110;
+		dram_timing.fsp_msg[0].fsp_cfg[20].val = 0x1;
+		dram_timing.fsp_msg[1].fsp_cfg[9].val = 0x110;
+		dram_timing.fsp_msg[1].fsp_cfg[21].val = 0x1;
 		dram_timing.fsp_msg[2].fsp_cfg[10].val = 0x110;
 		dram_timing.fsp_msg[2].fsp_cfg[22].val = 0x1;
-		dram_timing.fsp_msg[3].fsp_cfg[10].val = 0x110;
-		dram_timing.fsp_msg[3].fsp_cfg[22].val = 0x1;
 
 		if (!ddr_init(&dram_timing)) {
 			if (check_ram_available(SZ_2G))
@@ -119,53 +105,27 @@ static void spl_dram_init(void)
 		size = 1;
 	}
 
-	printf("Kontron SL i.MX8MM (N801X) module, %u GB RAM detected\n", size);
+	gd->ram_size = size;
 	writel(size, M4_BOOTROM_BASE_ADDR);
 }
 
-static void touch_reset(void)
-{
-	/*
-	 * Toggle the reset of the touch panel.
-	 */
-	imx_iomux_v3_setup_multiple_pads(touch_gpio, ARRAY_SIZE(touch_gpio));
-
-	gpio_request(TOUCH_RESET_GPIO, "touch_reset");
-	gpio_direction_output(TOUCH_RESET_GPIO, 0);
-	mdelay(20);
-	gpio_direction_output(TOUCH_RESET_GPIO, 1);
-	mdelay(20);
-}
-
-static int i2c_detect(u8 bus, u16 addr)
-{
-	struct udevice *udev;
-	int ret;
-
-	/*
-	 * Try to probe the touch controller to check if an LVDS panel is
-	 * connected.
-	 */
-	ret = i2c_get_chip_for_busnum(bus, addr, 0, &udev);
-	if (ret == 0)
-		return 0;
-
-	return 1;
-}
-
 int do_board_detect(void)
 {
-	bool lvds = false;
+	struct udevice *udev;
 
 	/*
-	 * Check the I2C touch controller to detect a LVDS panel.
+	 * Check for the RTC on the OSM module.
 	 */
-	imx_iomux_v3_setup_multiple_pads(i2c2_pads, ARRAY_SIZE(i2c2_pads));
-	touch_reset();
+	imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
 
-	if (i2c_detect(1, 0x5d) == 0) {
-		printf("Touch controller detected, assuming LVDS panel...\n");
-		lvds = true;
+	if (i2c_get_chip_for_busnum(0, 0x52, 0, &udev) == 0) {
+		gd->board_type = BOARD_TYPE_KTN_N802X;
+		printf("Kontron OSM-S i.MX8MM (N802X) module, %u GB RAM detected\n",
+		       (unsigned int)gd->ram_size);
+	} else {
+		gd->board_type = BOARD_TYPE_KTN_N801X;
+		printf("Kontron SL i.MX8MM (N801X) module, %u GB RAM detected\n",
+		       (unsigned int)gd->ram_size);
 	}
 
 	/*
@@ -173,28 +133,25 @@ int do_board_detect(void)
 	 */
 	imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
 
-	if (i2c_detect(0, 0x58) == 0) {
+	if (i2c_get_chip_for_busnum(0, 0x58, 0, &udev) == 0) {
 		printf("### ATTENTION: DEPRECATED SOM REVISION (N8010 Rev0) DETECTED! ###\n");
-		printf("###  THIS HW IS NOT SUPPRTED AND BOOTING WILL PROBABLY FAIL   ###\n");
+		printf("###  THIS HW IS NOT SUPPORTED AND BOOTING WILL PROBABLY FAIL  ###\n");
 		printf("###             PLEASE UPGRADE TO LATEST MODULE               ###\n");
 	}
 
-	if (lvds)
-		gd->board_type = BOARD_TYPE_KTN_N801X_LVDS;
-	else
-		gd->board_type = BOARD_TYPE_KTN_N801X;
-
 	return 0;
 }
 
 int board_fit_config_name_match(const char *name)
 {
-	if (gd->board_type == BOARD_TYPE_KTN_N801X_LVDS && is_imx8mm() &&
-	    !strncmp(name, "imx8mm-kontron-n801x-s-lvds", 27))
+	if (gd->board_type == BOARD_TYPE_KTN_N801X && is_imx8mm() &&
+	    (!strcmp(name, "imx8mm-kontron-n801x-s") ||
+	     !strcmp(name, "imx8mm-kontron-bl")))
 		return 0;
 
-	if (gd->board_type == BOARD_TYPE_KTN_N801X && is_imx8mm() &&
-	    !strncmp(name, "imx8mm-kontron-n801x-s", 22))
+	if (gd->board_type == BOARD_TYPE_KTN_N802X && is_imx8mm() &&
+	    (!strcmp(name, "imx8mm-kontron-n802x-s") ||
+	     !strcmp(name, "imx8mm-kontron-bl-osm-s")))
 		return 0;
 
 	return -1;
@@ -205,11 +162,7 @@ void spl_board_init(void)
 	struct udevice *dev;
 	int ret;
 
-	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
-		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
-		if (ret)
-			printf("Failed to initialize %s: %d\n", dev->name, ret);
-	}
+	arch_misc_init();
 
 	puts("Normal Boot\n");
 
@@ -280,25 +233,3 @@ void board_init_f(ulong dummy)
 
 	board_init_r(NULL, 0);
 }
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	u32 bootdev = spl_boot_device();
-
-	/*
-	 * The default boot fuse settings use the SD card (MMC2) as primary
-	 * boot device, but allow SPI NOR as a fallback boot device.
-	 * We can't detect the fallback case and spl_boot_device() will return
-	 * BOOT_DEVICE_MMC2 despite the actual boot device being SPI NOR.
-	 * Therefore we try to load U-Boot proper vom SPI NOR after loading
-	 * from MMC has failed.
-	 */
-	spl_boot_list[0] = bootdev;
-
-	switch (bootdev) {
-	case BOOT_DEVICE_MMC1:
-	case BOOT_DEVICE_MMC2:
-		spl_boot_list[1] = BOOT_DEVICE_SPI;
-		break;
-	}
-}
diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c
index 61fc4ec85f0..18f5fd5c5ee 100644
--- a/board/menlo/mx8menlo/mx8menlo.c
+++ b/board/menlo/mx8menlo/mx8menlo.c
@@ -14,5 +14,5 @@
 
 void board_early_init(void)
 {
-	init_uart_clk(1);
+	init_uart_clk(0);
 }
diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index d87ab6d4497..1bae9b1170d 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -42,16 +42,6 @@ static void spl_dram_init(void)
 	ddr_init(&dram_timing);
 }
 
-void spl_board_init(void)
-{
-	/* Serial download mode */
-	if (is_usb_boot()) {
-		puts("Back to ROM, SDP\n");
-		restore_boot_params();
-	}
-	puts("Normal Boot\n");
-}
-
 int board_fit_config_name_match(const char *name)
 {
 	return 0;
diff --git a/board/tbs/tbs2910/MAINTAINERS b/board/tbs/tbs2910/MAINTAINERS
index 1e3c0d0ece8..72f98d1a695 100644
--- a/board/tbs/tbs2910/MAINTAINERS
+++ b/board/tbs/tbs2910/MAINTAINERS
@@ -1,7 +1,7 @@
 TBS2910 BOARD
 M:	Soeren Moch <[email protected]>
 S:	Maintained
-F:	arch/arm/dts/imx6q-tbs2910.dts
+F:	arch/arm/dts/imx6q-tbs2910*
 F:	board/tbs/tbs2910/
 F:	configs/tbs2910_defconfig
 F:	doc/board/tbs/
diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c
index fb9aae6c9c8..210665bd6a9 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -53,21 +53,7 @@ void spl_dram_init(void)
 
 void spl_board_init(void)
 {
-	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
-		struct udevice *dev;
-		int ret;
-
-		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
-		if (ret)
-			printf("Failed to initialize %s: %d\n", dev->name, ret);
-	}
-
-	/* Serial download mode */
-	if (is_usb_boot()) {
-		puts("Back to ROM, SDP\n");
-		restore_boot_params();
-	}
-	puts("Normal Boot\n");
+	arch_misc_init();
 }
 
 #ifdef CONFIG_SPL_LOAD_FIT
diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
index bad8833b228..55c02653da6 100644
--- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c
+++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
@@ -125,6 +125,6 @@ int board_phys_sdram_size(phys_size_t *size)
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-	return 0;
+	return ft_common_board_setup(blob, bd);
 }
 #endif
diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c
index 6f1931ffaca..1838b464a0d 100644
--- a/board/toradex/verdin-imx8mp/spl.c
+++ b/board/toradex/verdin-imx8mp/spl.c
@@ -17,6 +17,8 @@
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/arch/ddr.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
 #include <power/pmic.h>
 #include <power/pca9450.h>
 
@@ -43,6 +45,15 @@ void spl_dram_init(void)
 
 void spl_board_init(void)
 {
+	if (IS_ENABLED(CONFIG_FSL_CAAM)) {
+		struct udevice *dev;
+		int ret;
+
+		ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
+		if (ret)
+			printf("Failed to initialize caam_jr: %d\n", ret);
+	}
+
 	/*
 	 * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
 	 * not allow to change it. Should set the clock after PMIC
diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
index 783e2bd0d25..9c2e44a1229 100644
--- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c
+++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
@@ -118,9 +118,19 @@ int board_late_init(void)
 	return 0;
 }
 
+int board_phys_sdram_size(phys_size_t *size)
+{
+	if (!size)
+		return -EINVAL;
+
+	*size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE);
+
+	return 0;
+}
+
 #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-	return 0;
+	return ft_common_board_setup(blob, bd);
 }
 #endif