Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

fsl-qoriq: Fixes and updates on fsl-layerscape
mpc85xx: fixes and code cleanup

7 files changed, 62 insertions, 20 deletions

diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig
index 778b8d8d5a5..d66c7804b13 100644
--- a/board/freescale/ls1043ardb/Kconfig
+++ b/board/freescale/ls1043ardb/Kconfig
@@ -13,14 +13,6 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "ls1043ardb"
 
-config SYS_HAS_ARMV8_SECURE_BASE
-	bool "Enable secure address for PSCI image"
-	depends on ARMV8_PSCI
-	help
-	  PSCI image can be re-located to secure RAM.
-	  If enabled, please also define the value for ARMV8_SECURE_BASE,
-	  for LS1043ARDB, it could be some address in OCRAM.
-
 if FSL_LS_PPA
 config SYS_LS_PPA_FW_ADDR
 	hex "PPA Firmware Addr"
diff --git a/board/freescale/ls1046afrwy/MAINTAINERS b/board/freescale/ls1046afrwy/MAINTAINERS
index cb8aa8c3780..8f360e1820f 100644
--- a/board/freescale/ls1046afrwy/MAINTAINERS
+++ b/board/freescale/ls1046afrwy/MAINTAINERS
@@ -5,8 +5,4 @@ F:	board/freescale/ls1046afrwy/
 F:	board/freescale/ls1046afrwy/ls1046afrwy.c
 F:	include/configs/ls1046afrwy.h
 F:	configs/ls1046afrwy_tfa_defconfig
-
-LS1046AFRWY_SECURE_BOOT BOARD
-M:	Manish Tomar <[email protected]>
-S:	Maintained
 F:	configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index b6f0d204267..6665aa4ba94 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -147,8 +147,10 @@ int board_early_init_f(void)
 {
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 
-	setbits_be32(&gur->pmuxcr,
-			(MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
+	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_CD);
+#ifndef SDHC_WP_IS_GPIO
+	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_WP);
+#endif
 	clrbits_be32(&gur->sdhcdcr, SDHCDCR_CD_INV);
 
 	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
@@ -191,7 +193,7 @@ int checkboard(void)
 	if (ret) {
 		printf("%s: Cannot find udev for a bus %d\n", __func__,
 		       bus_num);
-		return -ENXIO;
+		return 0; /* Don't want to hang() on this error */
 	}
 
 	if (dm_i2c_read(dev, 0, &in, 1) < 0 ||
@@ -216,6 +218,10 @@ int checkboard(void)
 	puts("rom_loc: ");
 	if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD) {
 		puts("sd");
+#ifdef __SW_BOOT_SD2
+	} else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD2) {
+		puts("sd");
+#endif
 #ifdef __SW_BOOT_SPI
 	} else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SPI) {
 		puts("spi");
@@ -353,10 +359,10 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
 	const char *soc_usb_compat = "fsl-usb2-dr";
 	int usb_err, usb1_off, usb2_off;
-#endif
 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 	int err;
 #endif
+#endif
 
 	ft_cpu_setup(blob, bd);
 
@@ -374,6 +380,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	fsl_fdt_fixup_dr_usb(blob, bd);
 #endif
 
+#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
 #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
 	/* Delete eLBC node as it is muxed with USB2 controller */
 	if (hwconfig("usb2")) {
@@ -395,7 +402,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	}
 #endif
 
-#if defined(CONFIG_TARGET_P1020RDB_PD) || defined(CONFIG_TARGET_P1020RDB_PC)
 /* Delete USB2 node as it is muxed with eLBC */
 	usb1_off = fdt_node_offset_by_compatible(blob, -1,
 		soc_usb_compat);
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index f855f3a81c3..22156f2824e 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -83,12 +83,15 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 			CONFIG_SPL_RELOC_MALLOC_SIZE);
 	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
 
+#ifdef CONFIG_SPL_ENV_SUPPORT
 #ifndef CONFIG_SPL_NAND_BOOT
 	env_init();
 #endif
+#endif
 #ifdef CONFIG_SPL_MMC_BOOT
 	mmc_initialize(bd);
 #endif
+#ifdef CONFIG_SPL_ENV_SUPPORT
 	/* relocate environment function pointers etc. */
 #ifdef CONFIG_SPL_NAND_BOOT
 	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
@@ -98,6 +101,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 #else
 	env_relocate();
 #endif
+#endif
 
 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
 	i2c_init_all();
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index fcd7a55199f..5931ec650bd 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -79,16 +79,16 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
 #if defined(CONFIG_SYS_RAMBOOT) || \
 	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
-	/* *I*G - eSDHC/eSPI/NAND boot */
+	/* **M** - 1G DDR for eSDHC/eSPI/NAND boot */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
 			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
 			0, 8, BOOKE_PAGESZ_1G, 1),
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
-	/* 2G DDR on P1020MBG, map the second 1G */
+	/* **M** - 2G DDR on P1020MBG, map the second 1G */
 	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
 			CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
-			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+			MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
 			0, 9, BOOKE_PAGESZ_1G, 1),
 #endif
 #endif /* RAMBOOT/SPL */
diff --git a/board/kontron/sl28/Makefile b/board/kontron/sl28/Makefile
index 5d220f07447..084c11da376 100644
--- a/board/kontron/sl28/Makefile
+++ b/board/kontron/sl28/Makefile
@@ -6,6 +6,8 @@ endif
 
 obj-y += common.o ddr.o
 
+obj-$(CONFIG_ARMV8_PSCI) += psci.o
+
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
 obj-$(CONFIG_SPL_ATF) += spl_atf.o
diff --git a/board/kontron/sl28/psci.c b/board/kontron/sl28/psci.c
new file mode 100644
index 00000000000..19f0ef3b6df
--- /dev/null
+++ b/board/kontron/sl28/psci.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <asm/secure.h>
+#include <asm/psci.h>
+#include <asm/types.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+#define GPIO2_GPDIR	0x2310000
+#define GPIO2_GPDAT	0x2310008
+#define RSTCR		0x1e60000
+#define RESET_REQ	BIT(1)
+
+u32 __secure psci_version(void)
+{
+	return ARM_PSCI_VER_0_2;
+}
+
+void __secure psci_system_reset(void)
+{
+	writel(RESET_REQ, RSTCR);
+
+	while (1)
+		wfi();
+}
+
+void __secure psci_system_off(void)
+{
+	int i;
+
+	writel(0x02000000, GPIO2_GPDIR);
+	writel(0, GPIO2_GPDAT);
+
+	/* make sure the management controller has sampled the input */
+	for (i = 0; i < (1 << 11); i++)
+		asm("nop");
+
+	writel(RESET_REQ, RSTCR);
+
+	while (1)
+		wfi();
+}