Merge branch '2023-10-11-assorted-fixes-and-updates'

- Assorted TI K3 updates, use ".dtso" for device tree overlays to match
  general usage, mkimage fixes/improvements, assorted platform
  updates/fixes, other assorted driver/platform fixes.

4 files changed, 124 insertions, 3 deletions

diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index 15f5310c7bf..e35e55fb5de 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -160,7 +160,7 @@ static bool board_is_sr1(void)
 	struct iot2050_info *info = IOT2050_INFO_DATA;
 
 	return info->magic == IOT2050_INFO_MAGIC &&
-		strstr((char *)info->name, "-PG2") != NULL;
+		strstr((char *)info->name, "-PG2") == NULL;
 }
 
 static bool board_is_m2(void)
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c
index 204e5a41a5b..9585944d80c 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -145,13 +145,27 @@ int dram_init(void)
 {
 	struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
 	struct draminfo_entry *ent = synquacer_draminfo->entry;
+	unsigned long size = 0;
+	int i;
+
+	for (i = 0; i < synquacer_draminfo->nr_regions; i++)
+		size += ent[i].size;
 
-	gd->ram_size = ent[0].size;
+	gd->ram_size = size;
 	gd->ram_base = ent[0].base;
 
 	return 0;
 }
 
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
+{
+	struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
+	struct draminfo_entry *ent = synquacer_draminfo->entry;
+
+	return ent[synquacer_draminfo->nr_regions - 1].base +
+	       ent[synquacer_draminfo->nr_regions - 1].size;
+}
+
 int dram_init_banksize(void)
 {
 	struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
diff --git a/board/xen/xenguest_arm64/MAINTAINERS b/board/xen/xenguest_arm64/MAINTAINERS
index 264920e240f..7a317366ec4 100644
--- a/board/xen/xenguest_arm64/MAINTAINERS
+++ b/board/xen/xenguest_arm64/MAINTAINERS
@@ -6,3 +6,4 @@ F:	board/xen/xenguest_arm64/
 F:	doc/board/xen/
 F:	include/configs/xenguest_arm64.h
 F:	configs/xenguest_arm64_defconfig
+F:	configs/xenguest_arm64_virtio_defconfig
diff --git a/board/xen/xenguest_arm64/xenguest_arm64.c b/board/xen/xenguest_arm64/xenguest_arm64.c
index 6e10bba76b7..244070a242d 100644
--- a/board/xen/xenguest_arm64/xenguest_arm64.c
+++ b/board/xen/xenguest_arm64/xenguest_arm64.c
@@ -8,12 +8,15 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
 #include <xen.h>
 #include <asm/global_data.h>
+#include <virtio_types.h>
+#include <virtio.h>
 
 #include <asm/io.h>
 #include <asm/armv8/mmu.h>
@@ -49,7 +52,14 @@ void *board_fdt_blob_setup(int *err)
 	return (void *)rom_pointer[0];
 }
 
-#define MAX_MEM_MAP_REGIONS 5
+/*
+ * MAX_MEM_MAP_REGIONS should respect to:
+ * 3 Xen related regions
+ * 6 regions for 2 PCI Host bridges
+ * 10 regions for MMIO devices
+ * 2 memory regions
+ */
+#define MAX_MEM_MAP_REGIONS 22
 static struct mm_region xen_mem_map[MAX_MEM_MAP_REGIONS];
 struct mm_region *mem_map = xen_mem_map;
 
@@ -63,6 +73,93 @@ static int get_next_memory_node(const void *blob, int mem)
 	return mem;
 }
 
+#ifdef CONFIG_VIRTIO_BLK
+#ifdef CONFIG_VIRTIO_PCI
+static void add_pci_mem_map(const void *blob, int *cnt)
+{
+	struct fdt_resource reg_res;
+	int node = -1, len = 0, cells_per_record = 0, max_regions = 0;
+	int pci_addr_cells = 0, addr_cells = 0, size_cells = 0;
+
+	while ((node = fdt_node_offset_by_prop_value(blob, node, "compatible",
+						     "pci-host-ecam-generic",
+						     sizeof("pci-host-ecam-generic"))) >= 0) {
+		if ((*cnt) >= MAX_MEM_MAP_REGIONS ||
+		    fdt_get_resource(blob, node, "reg", 0, &reg_res) < 0)
+			return;
+
+		xen_mem_map[*cnt].virt = reg_res.start;
+		xen_mem_map[*cnt].phys = reg_res.start;
+		xen_mem_map[*cnt].size = fdt_resource_size(&reg_res);
+		xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+								   PTE_BLOCK_INNER_SHARE);
+		(*cnt)++;
+
+		const u32 *prop = fdt_getprop(blob, node, "ranges", &len);
+
+		if (!prop)
+			return;
+
+		pci_addr_cells =  fdt_address_cells(blob, node);
+		addr_cells = fdt_address_cells(blob, 0);
+		size_cells = fdt_size_cells(blob, node);
+
+		/* PCI addresses are always 3-cells */
+		len /= sizeof(u32);
+		cells_per_record = pci_addr_cells + addr_cells + size_cells;
+		max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS;
+
+		for (int i = 0; i < max_regions; i++, len -= cells_per_record) {
+			u64 pci_addr, addr, size;
+			int space_code;
+			u32 flags;
+
+			if (((*cnt) >= MAX_MEM_MAP_REGIONS) || len < cells_per_record)
+				return;
+
+			flags = fdt32_to_cpu(prop[0]);
+			space_code = (flags >> 24) & 3;
+			pci_addr = fdtdec_get_number(prop + 1, 2);
+			prop += pci_addr_cells;
+			addr = fdtdec_get_number(prop, addr_cells);
+			prop += addr_cells;
+			size = fdtdec_get_number(prop, size_cells);
+			prop += size_cells;
+
+			xen_mem_map[*cnt].virt = addr;
+			xen_mem_map[*cnt].phys = addr;
+			xen_mem_map[*cnt].size = size;
+			xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+						   PTE_BLOCK_INNER_SHARE);
+			(*cnt)++;
+		}
+	}
+}
+#endif
+
+#ifdef CONFIG_VIRTIO_MMIO
+static void add_mmio_mem_map(const void *blob, int *cnt)
+{
+	int node = -1;
+	struct fdt_resource reg_res;
+
+	if ((*cnt) >= MAX_MEM_MAP_REGIONS)
+		return;
+	while ((node = fdt_node_offset_by_prop_value(blob, node, "compatible", "virtio,mmio",
+						     sizeof("virtio,mmio"))) >= 0) {
+		if (fdt_get_resource(blob, node, "reg", 0, &reg_res) < 0)
+			return;
+		xen_mem_map[*cnt].virt = reg_res.start;
+		xen_mem_map[*cnt].phys = reg_res.start;
+		xen_mem_map[*cnt].size = roundup(fdt_resource_size(&reg_res), PAGE_SIZE);
+		xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+				PTE_BLOCK_INNER_SHARE);
+		(*cnt)++;
+	}
+}
+#endif
+#endif
+
 static int setup_mem_map(void)
 {
 	int i = 0, ret, mem, reg = 0;
@@ -72,6 +169,7 @@ static int setup_mem_map(void)
 	phys_addr_t gnttab_base;
 	phys_size_t gnttab_sz;
 
+	memset(xen_mem_map, 0, sizeof(xen_mem_map));
 	/*
 	 * Add "magic" region which is used by Xen to provide some essentials
 	 * for the guest: we need console and xenstore.
@@ -143,6 +241,14 @@ static int setup_mem_map(void)
 		xen_mem_map[i].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 					PTE_BLOCK_INNER_SHARE);
 	}
+#ifdef CONFIG_VIRTIO_BLK
+#ifdef CONFIG_VIRTIO_PCI
+	add_pci_mem_map(blob, &i);
+#endif
+#ifdef CONFIG_VIRTIO_MMIO
+	add_mmio_mem_map(blob, &i);
+#endif
+#endif
 	return 0;
 }