diff options
| author | Ye Li <[email protected]> | 2021-10-29 09:46:25 +0800 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2022-02-05 13:38:39 +0100 |
| commit | 9c7fbebe5dd5d9daa9160b778432daef2a13f47f (patch) | |
| tree | edd9562a582ebb6ea3a1cd4491e4887edd208114 /board | |
| parent | 112b4cac9d9bd986a5c0e267193dff3e46bab68a (diff) | |
imx8ulp: Workaround LPOSC_TRIM fuse load issue
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0
LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision.
A0.2 will fix the issue in ROM. But A0.1 we have to workaround
it in SPL by setting LPOSCCTRL BIASCURRENT again.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/imx8ulp_evk/spl.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c index 42f8e262b6a..c17d5eff7dc 100644 --- a/board/freescale/imx8ulp_evk/spl.c +++ b/board/freescale/imx8ulp_evk/spl.c @@ -77,6 +77,12 @@ void spl_board_init(void) /* After AP set iomuxc0, the i2c can't work, Need M33 to set it now */ + /* Load the lposc fuse for single boot to work around ROM issue, + * The fuse depends on S400 to read. + */ + if (is_soc_rev(CHIP_REV_1_0) && get_boot_mode() == SINGLE_BOOT) + load_lposc_fuse(); + upower_init(); power_init_board(); |