Merge tag 'u-boot-rockchip-20191118' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Add support for rockchip SoC: PX30, RK3308
- Add and migrate to use common dram driver: PX30, RK3328, RK3399
- Add rk3399 board Tinker-s support
- Board config update for Rock960, Rockpro64

19 files changed, 317 insertions, 8 deletions

diff --git a/board/firefly/firefly-rk3308/Kconfig b/board/firefly/firefly-rk3308/Kconfig
new file mode 100644
index 00000000000..80b1ad85a2e
--- /dev/null
+++ b/board/firefly/firefly-rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROC_RK3308_CC
+
+config SYS_BOARD
+	default "firefly-rk3308"
+
+config SYS_VENDOR
+	default "firefly"
+
+config SYS_CONFIG_NAME
+	default "firefly_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/firefly/firefly-rk3308/MAINTAINERS b/board/firefly/firefly-rk3308/MAINTAINERS
new file mode 100644
index 00000000000..199079717e7
--- /dev/null
+++ b/board/firefly/firefly-rk3308/MAINTAINERS
@@ -0,0 +1,5 @@
+ROC-RK3308-CC
+M:      Andy Yan <[email protected]>
+S:      Maintained
+F:      board/firefly/firefly-rk3308/roc_cc_rk3308.c
+F:      configs/roc-cc-rk3308_defconfig
diff --git a/board/firefly/firefly-rk3308/Makefile b/board/firefly/firefly-rk3308/Makefile
new file mode 100644
index 00000000000..4c50b26ea9b
--- /dev/null
+++ b/board/firefly/firefly-rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= roc_cc_rk3308.o
diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
new file mode 100644
index 00000000000..5f0a6594b67
--- /dev/null
+++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch-rockchip/hardware.h>
+
+#if defined(CONFIG_DEBUG_UART)
+#define GRF_BASE	0xff000000
+
+enum {
+	GPIO1C7_SHIFT		= 8,
+	GPIO1C7_MASK		= GENMASK(11, 8),
+	GPIO1C7_GPIO		= 0,
+	GPIO1C7_UART1_RTSN,
+	GPIO1C7_UART2_TX_M0,
+	GPIO1C7_SPI2_MOSI,
+	GPIO1C7_JTAG_TMS,
+
+	GPIO1C6_SHIFT		= 4,
+	GPIO1C6_MASK		= GENMASK(7, 4),
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_UART1_CTSN,
+	GPIO1C6_UART2_RX_M0,
+	GPIO1C6_SPI2_MISO,
+	GPIO1C6_JTAG_TCLK,
+
+	GPIO4D3_SHIFT           = 6,
+	GPIO4D3_MASK            = GENMASK(7, 6),
+	GPIO4D3_GPIO            = 0,
+	GPIO4D3_SDMMC_D3,
+	GPIO4D3_UART2_TX_M1,
+
+	GPIO4D2_SHIFT           = 4,
+	GPIO4D2_MASK            = GENMASK(5, 4),
+	GPIO4D2_GPIO            = 0,
+	GPIO4D2_SDMMC_D2,
+	GPIO4D2_UART2_RX_M1,
+
+	UART2_IO_SEL_SHIFT	= 2,
+	UART2_IO_SEL_MASK	= GENMASK(3, 2),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+	UART2_IO_SEL_USB,
+};
+
+void board_debug_uart_init(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART2 channel m0 on the rk3308 */
+	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio1ch_iomux,
+		     GPIO1C6_MASK | GPIO1C7_MASK,
+		     GPIO1C6_UART2_RX_M0 << GPIO1C6_SHIFT |
+		     GPIO1C7_UART2_TX_M0 << GPIO1C7_SHIFT);
+}
+#endif
+
+#define KEY_DOWN_MIN_VAL        0
+#define KEY_DOWN_MAX_VAL        30
+
+int rockchip_dnl_key_pressed(void)
+{
+	unsigned int val;
+
+	if (adc_channel_single_shot("saradc", 1, &val)) {
+		printf("%s read adc key val failed\n", __func__);
+		return false;
+	}
+
+	if (val >= KEY_DOWN_MIN_VAL && val <= KEY_DOWN_MAX_VAL)
+		return true;
+	else
+		return false;
+}
diff --git a/board/pine64/rockpro64_rk3399/Kconfig b/board/pine64/rockpro64_rk3399/Kconfig
new file mode 100644
index 00000000000..3353f1fd095
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCKPRO64_RK3399
+
+config SYS_BOARD
+	default "rockpro64_rk3399"
+
+config SYS_VENDOR
+	default "pine64"
+
+config SYS_CONFIG_NAME
+	default "rockpro64_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS b/board/pine64/rockpro64_rk3399/MAINTAINERS
new file mode 100644
index 00000000000..303db144aab
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+ROCKPRO64
+M:	Akash Gajjar <[email protected]>
+M:	Jagan Teki <[email protected]>
+S:	Maintained
+F:	board/pine64/rockpro64_rk3399
+F:	include/configs/rockpro64_rk3399.h
+F:	arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+F:	configs/rockpro64-rk3399_defconfig
diff --git a/board/pine64/rockpro64_rk3399/Makefile b/board/pine64/rockpro64_rk3399/Makefile
new file mode 100644
index 00000000000..b015c47e6fa
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2019 Vasily Khoruzhick
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= rockpro64-rk3399.o
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
new file mode 100644
index 00000000000..3f602357713
--- /dev/null
+++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Vasily Khoruzhick <[email protected]>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/misc.h>
+
+#define GRF_IO_VSEL_BT565_SHIFT 0
+#define PMUGRF_CON0_VSEL_SHIFT 8
+
+#ifdef CONFIG_MISC_INIT_R
+static void setup_iodomain(void)
+{
+	struct rk3399_grf_regs *grf =
+	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	struct rk3399_pmugrf_regs *pmugrf =
+	    syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	/* BT565 is in 1.8v domain */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
+
+	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
+	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
+}
+
+int misc_init_r(void)
+{
+	const u32 cpuid_offset = 0x7;
+	const u32 cpuid_length = 0x10;
+	u8 cpuid[cpuid_length];
+	int ret;
+
+	setup_iodomain();
+
+	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+	if (ret)
+		return ret;
+
+	ret = rockchip_cpuid_set(cpuid, cpuid_length);
+	if (ret)
+		return ret;
+
+	ret = rockchip_setup_macaddr();
+
+	return ret;
+}
+
+#endif
diff --git a/board/rockchip/evb_px30/Kconfig b/board/rockchip/evb_px30/Kconfig
new file mode 100644
index 00000000000..0042c8e4db1
--- /dev/null
+++ b/board/rockchip/evb_px30/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_PX30
+
+config SYS_BOARD
+	default "evb_px30"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_px30"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_px30/MAINTAINERS b/board/rockchip/evb_px30/MAINTAINERS
new file mode 100644
index 00000000000..cf13f2419ea
--- /dev/null
+++ b/board/rockchip/evb_px30/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-PX30
+M:      Kever Yang <[email protected]>
+S:      Maintained
+F:      board/rockchip/evb_px30
+F:      include/configs/evb_px30.h
+F:      configs/evb-px30_defconfig
diff --git a/board/rockchip/evb_px30/Makefile b/board/rockchip/evb_px30/Makefile
new file mode 100644
index 00000000000..74b0b9f44fa
--- /dev/null
+++ b/board/rockchip/evb_px30/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_px30.o
diff --git a/board/rockchip/evb_px30/evb_px30.c b/board/rockchip/evb_px30/evb_px30.c
new file mode 100644
index 00000000000..29464ae63ec
--- /dev/null
+++ b/board/rockchip/evb_px30/evb_px30.c
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
diff --git a/board/rockchip/evb_rk3308/Kconfig b/board/rockchip/evb_rk3308/Kconfig
new file mode 100644
index 00000000000..0074429cb6d
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3308
+
+config SYS_BOARD
+	default "evb_rk3308"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS
new file mode 100644
index 00000000000..0af119ae0aa
--- /dev/null
+++ b/board/rockchip/evb_rk3308/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3308
+M:      Andy Yan <[email protected]>
+S:      Maintained
+F:      board/rockchip/evb_rk3308
+F:      include/configs/evb_rk3308.h
+F:      configs/evb-rk3308_defconfig
diff --git a/board/rockchip/evb_rk3308/Makefile b/board/rockchip/evb_rk3308/Makefile
new file mode 100644
index 00000000000..05de5560f14
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk3308.o
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
new file mode 100644
index 00000000000..180f1fe4f00
--- /dev/null
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <adc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define KEY_DOWN_MIN_VAL        0
+#define KEY_DOWN_MAX_VAL        30
+
+/*
+ * Two board variants whith adc channel 3 is for board id
+ * v10: 1024, v11: 512
+ * v10: adc channel 0 for dnl key
+ * v11: adc channel 1 for dnl key
+ */
+int rockchip_dnl_key_pressed(void)
+{
+	unsigned int key_val, id_val;
+	int key_ch;
+
+	if (adc_channel_single_shot("saradc", 3, &id_val)) {
+		printf("%s read board id failed\n", __func__);
+		return false;
+	}
+
+	if (abs(id_val - 1024) <= 30)
+		key_ch = 0;
+	else
+		key_ch = 1;
+
+	if (adc_channel_single_shot("saradc", key_ch, &key_val)) {
+		printf("%s read adc key val failed\n", __func__);
+		return false;
+	}
+
+	if (key_val >= KEY_DOWN_MIN_VAL && key_val <= KEY_DOWN_MAX_VAL)
+		return true;
+	else
+		return false;
+}
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index 139791795ec..eab4c4c5259 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -58,7 +58,7 @@ F:	arch/arm/dts/rk3399-orangepi-u-boot.dtsi
 ROC-RK3399-PC
 M:	Levin Du <[email protected]>
 S:	Maintained
-F:	configs/roc-rk3399-pc_defconfig
+F:	configs/roc-pc-rk3399_defconfig
 F:	arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
 
 ROCK-PI-4
@@ -67,10 +67,3 @@ M:	Jagan Teki <[email protected]>
 S:	Maintained
 F:	configs/rock-pi-4-rk3399_defconfig
 F:	arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
-
-ROCKPRO64
-M:	Akash Gajjar <[email protected]>
-M:	Jagan Teki <[email protected]>
-S:	Maintained
-F:	configs/rockpro64-rk3399_defconfig
-F:	arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
diff --git a/board/rockchip/tinker_rk3288/MAINTAINERS b/board/rockchip/tinker_rk3288/MAINTAINERS
index cddceafb6e9..ed5de682c97 100644
--- a/board/rockchip/tinker_rk3288/MAINTAINERS
+++ b/board/rockchip/tinker_rk3288/MAINTAINERS
@@ -4,3 +4,10 @@ S:	Maintained
 F:	board/rockchip/tinker_rk3288
 F:	include/configs/tinker_rk3288.h
 F:	configs/tinker-rk3288_defconfig
+
+TINKER-S-RK3288
+M:	Michael Trimarchi <[email protected]>
+S:	Maintained
+F:	board/rockchip/tinker_rk3288
+F:	include/configs/tinker_rk3288.h
+F:	configs/tinker-s-rk3288_defconfig
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 6c76c3c25c4..7a0c3c997d9 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -8,6 +8,8 @@
 #include <env.h>
 #include <i2c_eeprom.h>
 #include <netdev.h>
+#include <asm/arch-rockchip/bootrom.h>
+#include <asm/io.h>
 
 static int get_ethaddr_from_eeprom(u8 *addr)
 {
@@ -33,3 +35,13 @@ int rk3288_board_late_init(void)
 
 	return 0;
 }
+
+int mmc_get_env_dev(void)
+{
+	u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+	if (bootdevice_brom_id == BROM_BOOTSOURCE_EMMC)
+		return 0;
+
+	return 1;
+}