Merge tag 'xilinx-for-v2024.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

AMD/Xilinx changes for v2024.10-rc1

common:
- spl: Introduce SoC specific init function

xilinx:
- Enable FF-A and NVMEM
- Rename spl_board_init() to spl_soc_init()

zynqmp:
- DT alignments
- Enable reset from SPL
- Enable USB3 for KD240
- Align multiboot register on Kria for proper reboot
- Allow multiboot environment write even in saved environment
- Move zynqmp commands from board/ to arch/
- Clean up xilinx_zynqmp.h

versal:
- Do not prioritize boot device if driver is not enabled

versal-net:
- Setup location for redundant variables in SPI

versal2:
- Add support for new SOC

mmc:
- Fix tap delay for SD on Versal NET

spi:
- Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part

gpio:
- Cover MODEPIN firmware dependency

14 files changed, 504 insertions, 474 deletions

diff --git a/board/amd/common b/board/amd/common
new file mode 120000
index 00000000000..cd4d172974b
--- /dev/null
+++ b/board/amd/common
@@ -0,0 +1 @@
+../xilinx/common/
\ No newline at end of file
diff --git a/board/amd/versal2/Kconfig b/board/amd/versal2/Kconfig
new file mode 100644
index 00000000000..ab46af6935e
--- /dev/null
+++ b/board/amd/versal2/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2020 - 2022, Xilinx, Inc.
+# Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
+#
+if ARCH_VERSAL2
+
+config CMD_VERSAL2
+	bool "Enable Versal Gen 2 specific commands"
+	default y
+	depends on ZYNQMP_FIRMWARE
+	help
+	  Select this to enable AMD Versal Gen 2 specific commands.
+	  Commands like versal2 loadpdi are enabled by this.
+
+endif
diff --git a/board/amd/versal2/MAINTAINERS b/board/amd/versal2/MAINTAINERS
new file mode 100644
index 00000000000..af7913d8db3
--- /dev/null
+++ b/board/amd/versal2/MAINTAINERS
@@ -0,0 +1,7 @@
+XILINX_VERSAL2 BOARDS
+M:	Michal Simek <[email protected]>
+S:	Maintained
+T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
+F:	arch/arm/dts/versal2*
+F:	board/amd/
+F:	configs/amd*
diff --git a/board/amd/versal2/Makefile b/board/amd/versal2/Makefile
new file mode 100644
index 00000000000..3a044517f0c
--- /dev/null
+++ b/board/amd/versal2/Makefile
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2021 - 2022, Xilinx, Inc.
+# Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
+#
+# Michal Simek <[email protected]>
+#
+
+obj-y	:= board.o
+
+obj-$(CONFIG_CMD_VERSAL2)   += cmds.o
diff --git a/board/amd/versal2/board.c b/board/amd/versal2/board.c
new file mode 100644
index 00000000000..5651d516a9e
--- /dev/null
+++ b/board/amd/versal2/board.c
@@ -0,0 +1,343 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <[email protected]>
+ */
+
+#include <cpu_func.h>
+#include <fdtdec.h>
+#include <init.h>
+#include <env_internal.h>
+#include <log.h>
+#include <malloc.h>
+#include <time.h>
+#include <asm/cache.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include "../../xilinx/common/board.h"
+
+#include <linux/bitfield.h>
+#include <debug_uart.h>
+#include <generated/dt.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	printf("EL Level:\tEL%d\n", current_el());
+
+	return 0;
+}
+
+static u32 platform_id, platform_version;
+
+char *soc_name_decode(void)
+{
+	char *name, *platform_name;
+
+	switch (platform_id) {
+	case VERSAL2_SPP:
+		platform_name = "spp";
+		break;
+	case VERSAL2_EMU:
+		platform_name = "emu";
+		break;
+	case VERSAL2_SPP_MMD:
+		platform_name = "spp-mmd";
+		break;
+	case VERSAL2_EMU_MMD:
+		platform_name = "emu-mmd";
+		break;
+	case VERSAL2_QEMU:
+		platform_name = "qemu";
+		break;
+	default:
+		return NULL;
+	}
+
+	/*
+	 * --rev. are 6 chars
+	 * max platform name is qemu which is 4 chars
+	 * platform version number are 1+1
+	 * Plus 1 char for \n
+	 */
+	name = calloc(1, strlen(CONFIG_SYS_BOARD) + 13);
+	if (!name)
+		return NULL;
+
+	sprintf(name, "%s-%s-rev%d.%d-el%d", CONFIG_SYS_BOARD,
+		platform_name, platform_version / 10,
+		platform_version % 10, current_el());
+
+	return name;
+}
+
+bool soc_detection(void)
+{
+	u32 version, ps_version;
+
+	version = readl(PMC_TAP_VERSION);
+	platform_id = FIELD_GET(PLATFORM_MASK, version);
+	ps_version = FIELD_GET(PS_VERSION_MASK, version);
+
+	debug("idcode %x, version %x, usercode %x\n",
+	      readl(PMC_TAP_IDCODE), version,
+	      readl(PMC_TAP_USERCODE));
+
+	debug("pmc_ver %lx, ps version %x, rtl version %lx\n",
+	      FIELD_GET(PMC_VERSION_MASK, version),
+	      ps_version,
+	      FIELD_GET(RTL_VERSION_MASK, version));
+
+	platform_version = FIELD_GET(PLATFORM_VERSION_MASK, version);
+
+	debug("Platform id: %d version: %d.%d\n", platform_id,
+	      platform_version / 10, platform_version % 10);
+
+	return true;
+}
+
+int board_early_init_r(void)
+{
+	u32 val;
+
+	if (current_el() != 3)
+		return 0;
+
+	debug("iou_switch ctrl div0 %x\n",
+	      readl(&crlapb_base->iou_switch_ctrl));
+
+	writel(IOU_SWITCH_CTRL_CLKACT_BIT |
+	       (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
+	       &crlapb_base->iou_switch_ctrl);
+
+	/* Global timer init - Program time stamp reference clk */
+	val = readl(&crlapb_base->timestamp_ref_ctrl);
+	val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
+	writel(val, &crlapb_base->timestamp_ref_ctrl);
+
+	debug("ref ctrl 0x%x\n",
+	      readl(&crlapb_base->timestamp_ref_ctrl));
+
+	/* Clear reset of timestamp reg */
+	writel(0, &crlapb_base->rst_timestamp);
+
+	/*
+	 * Program freq register in System counter and
+	 * enable system counter.
+	 */
+	writel(CONFIG_COUNTER_FREQUENCY,
+	       &iou_scntr_secure->base_frequency_id_register);
+
+	debug("counter val 0x%x\n",
+	      readl(&iou_scntr_secure->base_frequency_id_register));
+
+	writel(IOU_SCNTRS_CONTROL_EN,
+	       &iou_scntr_secure->counter_control_register);
+
+	debug("scntrs control 0x%x\n",
+	      readl(&iou_scntr_secure->counter_control_register));
+	debug("timer 0x%llx\n", get_ticks());
+	debug("timer 0x%llx\n", get_ticks());
+
+	return 0;
+}
+
+static u8 versal_net_get_bootmode(void)
+{
+	u8 bootmode;
+	u32 reg = 0;
+
+	reg = readl(&crp_base->boot_mode_usr);
+
+	if (reg >> BOOT_MODE_ALT_SHIFT)
+		reg >>= BOOT_MODE_ALT_SHIFT;
+
+	bootmode = reg & BOOT_MODES_MASK;
+
+	return bootmode;
+}
+
+static int boot_targets_setup(void)
+{
+	u8 bootmode;
+	struct udevice *dev;
+	int bootseq = -1;
+	int bootseq_len = 0;
+	int env_targets_len = 0;
+	const char *mode = NULL;
+	char *new_targets;
+	char *env_targets;
+
+	bootmode = versal_net_get_bootmode();
+
+	puts("Bootmode: ");
+	switch (bootmode) {
+	case USB_MODE:
+		puts("USB_MODE\n");
+		mode = "usb_dfu0 usb_dfu1";
+		break;
+	case JTAG_MODE:
+		puts("JTAG_MODE\n");
+		mode = "jtag pxe dhcp";
+		break;
+	case QSPI_MODE_24BIT:
+		puts("QSPI_MODE_24\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1030000", &dev)) {
+			debug("QSPI driver for QSPI device is not present\n");
+			break;
+		}
+		mode = "xspi";
+		bootseq = dev_seq(dev);
+		break;
+	case QSPI_MODE_32BIT:
+		puts("QSPI_MODE_32\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1030000", &dev)) {
+			debug("QSPI driver for QSPI device is not present\n");
+			break;
+		}
+		mode = "xspi";
+		bootseq = dev_seq(dev);
+		break;
+	case OSPI_MODE:
+		puts("OSPI_MODE\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1010000", &dev)) {
+			debug("OSPI driver for OSPI device is not present\n");
+			break;
+		}
+		mode = "xspi";
+		bootseq = dev_seq(dev);
+		break;
+	case EMMC_MODE:
+		puts("EMMC_MODE\n");
+		mode = "mmc";
+		bootseq = dev_seq(dev);
+		break;
+	case SELECTMAP_MODE:
+		puts("SELECTMAP_MODE\n");
+		break;
+	case SD_MODE:
+		puts("SD_MODE\n");
+		if (uclass_get_device_by_name(UCLASS_MMC,
+					      "mmc@f1040000", &dev)) {
+			debug("SD0 driver for SD0 device is not present\n");
+			break;
+		}
+		debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
+
+		mode = "mmc";
+		bootseq = dev_seq(dev);
+		break;
+	case SD1_LSHFT_MODE:
+		puts("LVL_SHFT_");
+		fallthrough;
+	case SD_MODE1:
+		puts("SD_MODE1\n");
+		if (uclass_get_device_by_name(UCLASS_MMC,
+					      "mmc@f1050000", &dev)) {
+			debug("SD1 driver for SD1 device is not present\n");
+			break;
+		}
+		debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
+
+		mode = "mmc";
+		bootseq = dev_seq(dev);
+		break;
+	default:
+		printf("Invalid Boot Mode:0x%x\n", bootmode);
+		break;
+	}
+
+	if (mode) {
+		if (bootseq >= 0) {
+			bootseq_len = snprintf(NULL, 0, "%i", bootseq);
+			debug("Bootseq len: %x\n", bootseq_len);
+		}
+
+		/*
+		 * One terminating char + one byte for space between mode
+		 * and default boot_targets
+		 */
+		env_targets = env_get("boot_targets");
+		if (env_targets)
+			env_targets_len = strlen(env_targets);
+
+		new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
+				     bootseq_len);
+		if (!new_targets)
+			return -ENOMEM;
+
+		if (bootseq >= 0)
+			sprintf(new_targets, "%s%x %s", mode, bootseq,
+				env_targets ? env_targets : "");
+		else
+			sprintf(new_targets, "%s %s", mode,
+				env_targets ? env_targets : "");
+
+		env_set("boot_targets", new_targets);
+	}
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	int ret;
+
+	if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
+		debug("Saved variables - Skipping\n");
+		return 0;
+	}
+
+	if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
+		return 0;
+
+	if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
+		ret = boot_targets_setup();
+		if (ret)
+			return ret;
+	}
+
+	return board_late_init_xilinx();
+}
+
+int dram_init_banksize(void)
+{
+	int ret;
+
+	ret = fdtdec_setup_memory_banksize();
+	if (ret)
+		return ret;
+
+	mem_map_fill();
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	int ret;
+
+	if (IS_ENABLED(CONFIG_SYS_MEM_RSVD_FOR_MMU))
+		ret = fdtdec_setup_mem_size_base();
+	else
+		ret = fdtdec_setup_mem_size_base_lowest();
+
+	if (ret)
+		return -EINVAL;
+
+	return 0;
+}
+
+void reset_cpu(void)
+{
+}
diff --git a/board/amd/versal2/cmds.c b/board/amd/versal2/cmds.c
new file mode 100644
index 00000000000..fbd99918a7f
--- /dev/null
+++ b/board/amd/versal2/cmds.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <[email protected]>
+ */
+
+#include <cpu_func.h>
+#include <command.h>
+#include <log.h>
+#include <memalign.h>
+#include <versalpl.h>
+#include <vsprintf.h>
+#include <zynqmp_firmware.h>
+
+/**
+ * do_versal2_load_pdi - Handle the "versal2 load pdi" command-line command
+ * @cmdtp:      Command data struct pointer
+ * @flag:       Command flag
+ * @argc:       Command-line argument count
+ * @argv:       Array of command-line arguments
+ *
+ * Processes the versal2 load pdi command
+ *
+ * Return: return 0 on success, Error value if command fails.
+ * CMD_RET_USAGE incase of incorrect/missing parameters.
+ */
+static int do_versal2_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char * const argv[])
+{
+	u32 buf_lo, buf_hi;
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	ulong addr, *pdi_buf;
+	size_t len;
+	int ret;
+
+	if (argc != cmdtp->maxargs) {
+		debug("pdi_load: incorrect parameters passed\n");
+		return CMD_RET_USAGE;
+	}
+
+	addr = simple_strtol(argv[1], NULL, 16);
+	if (!addr) {
+		debug("pdi_load: zero pdi_data address\n");
+		return CMD_RET_USAGE;
+	}
+
+	len = hextoul(argv[2], NULL);
+	if (!len) {
+		debug("pdi_load: zero size\n");
+		return CMD_RET_USAGE;
+	}
+
+	pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN);
+	if ((ulong)addr != (ulong)pdi_buf) {
+		memcpy((void *)pdi_buf, (void *)addr, len);
+		debug("Pdi addr:0x%lx aligned to 0x%lx\n",
+		      addr, (ulong)pdi_buf);
+	}
+
+	flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len);
+
+	buf_lo = lower_32_bits((ulong)pdi_buf);
+	buf_hi = upper_32_bits((ulong)pdi_buf);
+
+	ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo,
+				buf_hi, 0, ret_payload);
+	if (ret)
+		printf("PDI load failed with err: 0x%08x\n", ret);
+
+	return cmd_process_error(cmdtp, ret);
+}
+
+static char versal2_help_text[] =
+	"loadpdi addr len - Load pdi image\n"
+	"load pdi image at ddr address 'addr' with pdi image size 'len'\n"
+;
+
+U_BOOT_CMD_WITH_SUBCMDS(versal2, "Versal Gen 2 sub-system", versal2_help_text,
+			U_BOOT_SUBCMD_MKENT(loadpdi, 3, 1,
+					    do_versal2_load_pdi));
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 5c4ad8f1df9..c7df4ab5781 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -42,7 +42,7 @@ endif
 
 config XILINX_OF_BOARD_DTB_ADDR
 	hex "Default DTB pickup address"
-	default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET
+	default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
 	default 0x8000 if MICROBLAZE
 	default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
 	default 0x23000000 if TARGET_XILINX_MBV
@@ -52,10 +52,10 @@ config XILINX_OF_BOARD_DTB_ADDR
 
 config BOOT_SCRIPT_OFFSET
 	hex "Boot script offset"
-	depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || MICROBLAZE || TARGET_XILINX_MBV
+	depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2 || MICROBLAZE || TARGET_XILINX_MBV
 	default 0xFC0000 if ARCH_ZYNQ || MICROBLAZE
 	default 0x3E80000 if ARCH_ZYNQMP
-	default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET
+	default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2
 	default 0 if TARGET_XILINX_MBV
 	help
 	   Specifies distro boot script offset in NAND/QSPI/NOR flash.
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 77ba783501e..39474674cca 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -150,14 +150,29 @@ static int boot_targets_setup(void)
 		break;
 	case QSPI_MODE_24BIT:
 		puts("QSPI_MODE_24\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1030000", &dev)) {
+			debug("QSPI driver for QSPI device is not present\n");
+			break;
+		}
 		mode = "xspi0";
 		break;
 	case QSPI_MODE_32BIT:
 		puts("QSPI_MODE_32\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1030000", &dev)) {
+			debug("QSPI driver for QSPI device is not present\n");
+			break;
+		}
 		mode = "xspi0";
 		break;
 	case OSPI_MODE:
 		puts("OSPI_MODE\n");
+		if (uclass_get_device_by_name(UCLASS_SPI,
+					      "spi@f1010000", &dev)) {
+			debug("OSPI driver for OSPI device is not present\n");
+			break;
+		}
 		mode = "xspi0";
 		break;
 	case EMMC_MODE:
diff --git a/board/xilinx/zynqmp/Kconfig b/board/xilinx/zynqmp/Kconfig
deleted file mode 100644
index ffa2f0215d4..00000000000
--- a/board/xilinx/zynqmp/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-# Copyright (c) 2018, Xilinx, Inc.
-#
-# SPDX-License-Identifier: GPL-2.0
-
-if ARCH_ZYNQMP
-
-config CMD_ZYNQMP
-	bool "Enable ZynqMP specific commands"
-	depends on ZYNQMP_FIRMWARE
-	default y
-	help
-	  Enable ZynqMP specific commands like "zynqmp secure"
-	  which is used for zynqmp secure image verification.
-	  The secure image is a xilinx specific BOOT.BIN with
-	  either authentication or encryption or both encryption
-	  and authentication feature enabled while generating
-	  BOOT.BIN using Xilinx bootgen tool.
-
-endif
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 204e4fadf0e..9ab50eca400 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -40,10 +40,6 @@ $(obj)/pm_cfg_obj.o: $(shell cd $(srctree); readlink -f $(CONFIG_ZYNQMP_SPL_PM_C
 endif
 endif
 
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_CMD_ZYNQMP) += cmds.o
-endif
-
 # Suppress "warning: function declaration isn't a prototype"
 CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
 
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
deleted file mode 100644
index bf39c5472ea..00000000000
--- a/board/xilinx/zynqmp/cmds.c
+++ /dev/null
@@ -1,431 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * (C) Copyright 2018 Xilinx, Inc.
- * Siva Durga Prasad Paladugu <[email protected]>>
- */
-
-#include <command.h>
-#include <cpu_func.h>
-#include <env.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <vsprintf.h>
-#include <zynqmp_firmware.h>
-#include <linux/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <mach/zynqmp_aes.h>
-
-static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc,
-				   char *const argv[])
-{
-	u64 src_addr, addr;
-	u32 len, src_lo, src_hi;
-	u8 *key_ptr = NULL;
-	int ret;
-	u32 key_lo = 0;
-	u32 key_hi = 0;
-	u32 ret_payload[PAYLOAD_ARG_CNT];
-
-	if (argc < 4)
-		return CMD_RET_USAGE;
-
-	src_addr = simple_strtoull(argv[2], NULL, 16);
-	len = hextoul(argv[3], NULL);
-
-	if (argc == 5)
-		key_ptr = (uint8_t *)(uintptr_t)simple_strtoull(argv[4],
-								NULL, 16);
-
-	if ((ulong)src_addr != ALIGN((ulong)src_addr,
-				     CONFIG_SYS_CACHELINE_SIZE)) {
-		printf("Failed: source address not aligned:%lx\n",
-		       (ulong)src_addr);
-		return -EINVAL;
-	}
-
-	src_lo = lower_32_bits((ulong)src_addr);
-	src_hi = upper_32_bits((ulong)src_addr);
-	flush_dcache_range((ulong)src_addr, (ulong)(src_addr + len));
-
-	if (key_ptr) {
-		key_lo = lower_32_bits((ulong)key_ptr);
-		key_hi = upper_32_bits((ulong)key_ptr);
-		flush_dcache_range((ulong)key_ptr,
-				   (ulong)(key_ptr + KEY_PTR_LEN));
-	}
-
-	ret = xilinx_pm_request(PM_SECURE_IMAGE, src_lo, src_hi,
-				key_lo, key_hi, ret_payload);
-	if (ret) {
-		printf("Failed: secure op status:0x%x\n", ret);
-	} else {
-		addr = (u64)ret_payload[1] << 32 | ret_payload[2];
-		printf("Verified image at 0x%llx\n", addr);
-		env_set_hex("zynqmp_verified_img_addr", addr);
-	}
-
-	return ret;
-}
-
-static int do_zynqmp_mmio_read(struct cmd_tbl *cmdtp, int flag, int argc,
-			       char *const argv[])
-{
-	u32 read_val, addr;
-	int ret;
-
-	if (argc != cmdtp->maxargs)
-		return CMD_RET_USAGE;
-
-	addr = hextoul(argv[2], NULL);
-
-	ret = zynqmp_mmio_read(addr, &read_val);
-	if (!ret)
-		printf("mmio read value at 0x%x = 0x%x\n",
-		       addr, read_val);
-	else
-		printf("Failed: mmio read\n");
-
-	return ret;
-}
-
-static int do_zynqmp_mmio_write(struct cmd_tbl *cmdtp, int flag, int argc,
-				char *const argv[])
-{
-	u32 addr, mask, val;
-	int ret;
-
-	if (argc != cmdtp->maxargs)
-		return CMD_RET_USAGE;
-
-	addr = hextoul(argv[2], NULL);
-	mask = hextoul(argv[3], NULL);
-	val = hextoul(argv[4], NULL);
-
-	ret = zynqmp_mmio_write(addr, mask, val);
-	if (ret != 0)
-		printf("Failed: mmio write\n");
-
-	return ret;
-}
-
-static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc,
-			 char * const argv[])
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1);
-
-	if (zynqmp_firmware_version() <= PMUFW_V1_0) {
-		puts("ERR: PMUFW v1.0 or less is detected\n");
-		puts("ERR: Encrypt/Decrypt feature is not supported\n");
-		puts("ERR: Please upgrade PMUFW\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (argc < cmdtp->maxargs - 1)
-		return CMD_RET_USAGE;
-
-	aes->srcaddr = hextoul(argv[2], NULL);
-	aes->ivaddr = hextoul(argv[3], NULL);
-	aes->len = hextoul(argv[4], NULL);
-	aes->op = hextoul(argv[5], NULL);
-	aes->keysrc = hextoul(argv[6], NULL);
-	aes->dstaddr = hextoul(argv[7], NULL);
-
-	if (aes->keysrc == 0) {
-		if (argc < cmdtp->maxargs)
-			return CMD_RET_USAGE;
-
-		aes->keyaddr = hextoul(argv[8], NULL);
-	}
-
-	return zynqmp_aes_operation(aes);
-}
-
-#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
-static int do_zynqmp_tcm_init(struct cmd_tbl *cmdtp, int flag, int argc,
-			      char *const argv[])
-{
-	u8 mode;
-
-	if (argc != cmdtp->maxargs)
-		return CMD_RET_USAGE;
-
-	if (strcmp(argv[2], "lockstep") && strcmp(argv[2], "split")) {
-		printf("mode param should be lockstep or split\n");
-		return CMD_RET_FAILURE;
-	}
-
-	mode = hextoul(argv[2], NULL);
-	if (mode != TCM_LOCK && mode != TCM_SPLIT) {
-		printf("Mode should be either 0(lock)/1(split)\n");
-		return CMD_RET_FAILURE;
-	}
-
-	dcache_disable();
-	tcm_init(mode);
-	dcache_enable();
-
-	return CMD_RET_SUCCESS;
-}
-#endif
-
-static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int flag, int argc,
-			   char * const argv[])
-{
-	u32 addr, size;
-
-	if (argc != cmdtp->maxargs)
-		return CMD_RET_USAGE;
-
-	if (!strncmp(argv[2], "node", 4)) {
-		u32 id;
-		int ret;
-
-		if (!strncmp(argv[3], "close", 5))
-			return zynqmp_pmufw_config_close();
-
-		id = dectoul(argv[3], NULL);
-		if (!id) {
-			printf("Incorrect ID passed\n");
-			return CMD_RET_USAGE;
-		}
-
-		printf("Enable permission for node ID %d\n", id);
-
-		ret = zynqmp_pmufw_node(id);
-		if (ret == -ENODEV)
-			ret = 0;
-
-		return ret;
-	}
-
-	addr = hextoul(argv[2], NULL);
-	size = hextoul(argv[3], NULL);
-
-	zynqmp_pmufw_load_config_object((const void *)(uintptr_t)addr,
-					(size_t)size);
-
-	return 0;
-}
-
-static int do_zynqmp_rsa(struct cmd_tbl *cmdtp, int flag, int argc,
-			 char * const argv[])
-{
-	u64 srcaddr, mod, exp;
-	u32 srclen, rsaop, size, ret_payload[PAYLOAD_ARG_CNT];
-	int ret;
-
-	if (argc != cmdtp->maxargs)
-		return CMD_RET_USAGE;
-
-	if (zynqmp_firmware_version() <= PMUFW_V1_0) {
-		puts("ERR: PMUFW v1.0 or less is detected\n");
-		puts("ERR: Encrypt/Decrypt feature is not supported\n");
-		puts("ERR: Please upgrade PMUFW\n");
-		return CMD_RET_FAILURE;
-	}
-
-	srcaddr = hextoul(argv[2], NULL);
-	srclen = hextoul(argv[3], NULL);
-	if (srclen != RSA_KEY_SIZE) {
-		puts("ERR: srclen should be equal to 0x200(512 bytes)\n");
-		return CMD_RET_USAGE;
-	}
-
-	mod = hextoul(argv[4], NULL);
-	exp = hextoul(argv[5], NULL);
-	rsaop = hextoul(argv[6], NULL);
-	if (!(rsaop == 0 || rsaop == 1)) {
-		puts("ERR: rsaop should be either 0 or 1\n");
-		return CMD_RET_USAGE;
-	}
-
-	memcpy((void *)srcaddr + srclen, (void *)mod, MODULUS_LEN);
-
-	/*
-	 * For encryption we load public exponent (key size 4096-bits),
-	 * for decryption we load private exponent (32-bits)
-	 */
-	if (rsaop) {
-		memcpy((void *)srcaddr + srclen + MODULUS_LEN,
-		       (void *)exp, PUB_EXPO_LEN);
-		size = srclen + MODULUS_LEN + PUB_EXPO_LEN;
-	} else {
-		memcpy((void *)srcaddr + srclen + MODULUS_LEN,
-		       (void *)exp, PRIV_EXPO_LEN);
-		size = srclen + MODULUS_LEN + PRIV_EXPO_LEN;
-	}
-
-	flush_dcache_range((ulong)srcaddr,
-			   (ulong)(srcaddr) + roundup(size, ARCH_DMA_MINALIGN));
-
-	ret = xilinx_pm_request(PM_SECURE_RSA, upper_32_bits((ulong)srcaddr),
-				lower_32_bits((ulong)srcaddr), srclen, rsaop,
-				ret_payload);
-	if (ret || ret_payload[1]) {
-		printf("Failed: RSA status:0x%x, errcode:0x%x\n",
-		       ret, ret_payload[1]);
-		return CMD_RET_FAILURE;
-	}
-
-	return CMD_RET_SUCCESS;
-}
-
-static int do_zynqmp_sha3(struct cmd_tbl *cmdtp, int flag,
-			  int argc, char * const argv[])
-{
-	u64 srcaddr, hashaddr;
-	u32 srclen, ret_payload[PAYLOAD_ARG_CNT];
-	int ret;
-
-	if (argc > cmdtp->maxargs || argc < (cmdtp->maxargs - 1))
-		return CMD_RET_USAGE;
-
-	if (zynqmp_firmware_version() <= PMUFW_V1_0) {
-		puts("ERR: PMUFW v1.0 or less is detected\n");
-		puts("ERR: Encrypt/Decrypt feature is not supported\n");
-		puts("ERR: Please upgrade PMUFW\n");
-		return CMD_RET_FAILURE;
-	}
-
-	srcaddr = hextoul(argv[2], NULL);
-	srclen = hextoul(argv[3], NULL);
-
-	if (argc == 5) {
-		hashaddr = hextoul(argv[4], NULL);
-		flush_dcache_range(hashaddr,
-				   hashaddr + roundup(ZYNQMP_SHA3_SIZE,
-						      ARCH_DMA_MINALIGN));
-	} else {
-		hashaddr = srcaddr;
-	}
-
-	/* Check srcaddr or srclen != 0 */
-	if (!srcaddr || !srclen) {
-		puts("ERR: srcaddr & srclen should not be 0\n");
-		return CMD_RET_USAGE;
-	}
-
-	flush_dcache_range(srcaddr,
-			   srcaddr + roundup(srclen, ARCH_DMA_MINALIGN));
-
-	ret = xilinx_pm_request(PM_SECURE_SHA, 0, 0, 0,
-				ZYNQMP_SHA3_INIT, ret_payload);
-	if (ret || ret_payload[1]) {
-		printf("Failed: SHA INIT status:0x%x, errcode:0x%x\n",
-		       ret, ret_payload[1]);
-		return CMD_RET_FAILURE;
-	}
-
-	ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)srcaddr),
-				lower_32_bits((ulong)srcaddr),
-				srclen, ZYNQMP_SHA3_UPDATE, ret_payload);
-	if (ret || ret_payload[1]) {
-		printf("Failed: SHA UPDATE status:0x%x, errcode:0x%x\n",
-		       ret, ret_payload[1]);
-		return CMD_RET_FAILURE;
-	}
-
-	ret = xilinx_pm_request(PM_SECURE_SHA, upper_32_bits((ulong)hashaddr),
-				lower_32_bits((ulong)hashaddr),
-				ZYNQMP_SHA3_SIZE, ZYNQMP_SHA3_FINAL,
-				ret_payload);
-	if (ret || ret_payload[1]) {
-		printf("Failed: SHA FINAL status:0x%x, errcode:0x%x\n",
-		       ret, ret_payload[1]);
-		return CMD_RET_FAILURE;
-	}
-
-	return CMD_RET_SUCCESS;
-}
-
-static struct cmd_tbl cmd_zynqmp_sub[] = {
-	U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""),
-	U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""),
-	U_BOOT_CMD_MKENT(mmio_read, 3, 0, do_zynqmp_mmio_read, "", ""),
-	U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
-	U_BOOT_CMD_MKENT(aes, 9, 0, do_zynqmp_aes, "", ""),
-	U_BOOT_CMD_MKENT(rsa, 7, 0, do_zynqmp_rsa, "", ""),
-	U_BOOT_CMD_MKENT(sha3, 5, 0, do_zynqmp_sha3, "", ""),
-#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
-	U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""),
-#endif
-};
-
-/**
- * do_zynqmp - Handle the "zynqmp" command-line command
- * @cmdtp:	Command data struct pointer
- * @flag:	Command flag
- * @argc:	Command-line argument count
- * @argv:	Array of command-line arguments
- *
- * Processes the zynqmp specific commands
- *
- * Return: return 0 on success and CMD_RET_USAGE incase of misuse and error
- */
-static int do_zynqmp(struct cmd_tbl *cmdtp, int flag, int argc,
-		     char *const argv[])
-{
-	struct cmd_tbl *c;
-	int ret = CMD_RET_USAGE;
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	c = find_cmd_tbl(argv[1], &cmd_zynqmp_sub[0],
-			 ARRAY_SIZE(cmd_zynqmp_sub));
-	if (c)
-		ret = c->cmd(c, flag, argc, argv);
-
-	return cmd_process_error(c, ret);
-}
-
-/***************************************************/
-U_BOOT_LONGHELP(zynqmp,
-	"secure src len [key_addr] - verifies secure images of $len bytes\n"
-	"                            long at address $src. Optional key_addr\n"
-	"                            can be specified if user key needs to\n"
-	"                            be used for decryption\n"
-	"zynqmp mmio_read address - read from address\n"
-	"zynqmp mmio_write address mask value - write value after masking to\n"
-	"					address\n"
-	"zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr] -\n"
-	"	Encrypts or decrypts blob of data at src address and puts it\n"
-	"	back to dstaddr using key and iv at keyaddr and ivaddr\n"
-	"	respectively. keysrc value specifies from which source key\n"
-	"	has to be used, it can be User/Device/PUF key. A value of 0\n"
-	"	for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
-	"	aesop value specifies the operation which can be 0 for\n"
-	"	decrypt and 1 for encrypt operation\n"
-#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
-	"zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n"
-	"		       initialized before accessing to avoid ECC\n"
-	"		       errors. mode specifies in which mode TCM has\n"
-	"		       to be initialized. Supported modes will be\n"
-	"		       lock(0)/split(1)\n"
-#endif
-	"zynqmp pmufw address size - load PMU FW configuration object\n"
-	"zynqmp pmufw node <id> - load PMU FW configuration object, <id> in dec\n"
-	"zynqmp pmufw node close - disable config object loading\n"
-	"	node: keyword, id: NODE_ID in decimal format\n"
-	"zynqmp rsa srcaddr srclen mod exp rsaop -\n"
-	"	Performs RSA encryption and RSA decryption on blob of data\n"
-	"	at srcaddr and puts it back in srcaddr using modulus and\n"
-	"	public or private exponent\n"
-	"	srclen : must be key size(4096 bits)\n"
-	"	exp :	private key exponent for RSA decryption(4096 bits)\n"
-	"		public key exponent for RSA encryption(32 bits)\n"
-	"	rsaop :	0 for RSA Decryption, 1 for RSA Encryption\n"
-	"zynqmp sha3 srcaddr srclen [key_addr] -\n"
-	"	Generates sha3 hash value for data blob at srcaddr and puts\n"
-	"	48 bytes hash value into srcaddr\n"
-	"	Optional key_addr can be specified for saving sha3 hash value\n"
-	"	Note: srcaddr/srclen should not be 0\n"
-	);
-
-U_BOOT_CMD(
-	zynqmp, 9, 1, do_zynqmp,
-	"ZynqMP sub-system",
-	zynqmp_help_text
-);
diff --git a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
index 166e61431ba..274203ffaa3 100644
--- a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c
@@ -528,8 +528,8 @@ static unsigned long psu_mio_init_data(void)
 	psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
-	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
+	psu_mask_write(0xFF180130, 0x000000FEU, 0x00000000U);
+	psu_mask_write(0xFF180134, 0x000000FEU, 0x00000000U);
 	psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x50000000U);
 	psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B02020U);
 	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
@@ -569,21 +569,16 @@ static unsigned long psu_peripherals_init_data(void)
 	psu_mask_write(0xFD1A0100, 0x0001807CU, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
 	psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
-	psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
+	psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
 	psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
 	psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
-	psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
-	psu_mask_write(0xFF180320, 0x33840000U, 0x02840000U);
-	psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
-	psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
-	psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000080U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000010U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
-	psu_mask_write(0xFF5E0238, 0x00000004U, 0x00000000U);
+	psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
 	psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
 	psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
@@ -591,13 +586,15 @@ static unsigned long psu_peripherals_init_data(void)
 	psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
 	psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD18U);
 	psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
+	psu_mask_write(0xFF0A0284, 0x03FFFFFFU, 0x01000000U);
+	psu_mask_write(0xFF0A0288, 0x03FFFFFFU, 0x01000000U);
+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0100U);
 
 	mask_delay(1);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000002U);
+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0000U);
 
 	mask_delay(5);
-	psu_mask_write(0xFF5E0250, 0x00000F0FU, 0x00000202U);
+	psu_mask_write(0xFF0A0014, 0x03FF03FFU, 0x02FF0100U);
 
 	return 1;
 }
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index c4050af2a5a..b4c15b041cc 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -285,6 +285,18 @@ int dram_init(void)
 #if !CONFIG_IS_ENABLED(SYSRESET)
 void reset_cpu(void)
 {
+	if (!IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
+		log_warning("reset failed: ZYNQMP_FIRMWARE disabled");
+		return;
+	}
+
+	/* In case of !CONFIG_ZYNQMP_FIRMWARE the call to 'xilinx_pm_request()'
+	 * will be removed by the compiler due to the early return.
+	 * If CONFIG_ZYNQMP_FIRMWARE is defined in SPL 'xilinx_pm_request()'
+	 * will send command over IPI and requires pmufw to be present.
+	 */
+	xilinx_pm_request(PM_RESET_ASSERT, ZYNQMP_PM_RESET_SOFT,
+			  PM_RESET_ACTION_ASSERT, 0, 0, NULL);
 }
 #endif
 
@@ -519,6 +531,10 @@ int board_late_init(void)
 	usb_ether_init();
 #endif
 
+	multiboot = multi_boot();
+	if (multiboot >= 0)
+		env_set_hex("multiboot", multiboot);
+
 	if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
 		debug("Saved variables - Skipping\n");
 		return 0;
@@ -531,10 +547,6 @@ int board_late_init(void)
 	if (ret)
 		return ret;
 
-	multiboot = multi_boot();
-	if (multiboot >= 0)
-		env_set_hex("multiboot", multiboot);
-
 	if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
 		ret = boot_targets_setup();
 		if (ret)
diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env
index 846eceb0118..69e333c5388 100644
--- a/board/xilinx/zynqmp/zynqmp_kria.env
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -65,6 +65,7 @@ kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw nod
 tpm_setup=tpm autostart;
 
 board_setup=\
+zynqmp mmio_write 0xFFCA0010 0xfff 0; \
 if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\
 if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\
 if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;\