diff options
| author | Tom Rini <[email protected]> | 2024-11-19 12:58:05 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-11-19 12:58:05 -0600 |
| commit | 7fe55182d9263a62e18b450c97bdf0b8031e5667 (patch) | |
| tree | 0c983a9a7aee8ef4674ad9f98eacdd7e4b448cca /boot | |
| parent | 3d0da87cd4020f9e14a249c0e080341d668d9426 (diff) | |
| parent | 383fc2f50166fded0571d41baa7826eaaa5dba97 (diff) | |
Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.01-rc3:
- microblaze:
- Disable JFFS2
- fpga:
- pass compatible flag to fpga_load()
- zynqmp:
- SOM RTC fix
- SC(system controller) PMW polarity fix
- Fix ram_top calculation with introducing XILINX_MINI
- Fix RPU release command
- versal:
- Enable capsule update
- Enable soft reset and Micron octal flashes
- xilinx:
- Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
- Add new zynqmp driver
Diffstat (limited to 'boot')
| -rw-r--r-- | boot/image-board.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/boot/image-board.c b/boot/image-board.c index 1757e5816d8..b726bd6b303 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -624,9 +624,10 @@ int boot_get_fpga(struct bootm_headers *images) void *buf; int conf_noffset; int fit_img_result; - const char *uname, *name; + const char *uname, *name, *compatible; int err; int devnum = 0; /* TODO support multi fpga platforms */ + int flags = 0; if (!IS_ENABLED(CONFIG_FPGA)) return -ENOSYS; @@ -674,20 +675,29 @@ int boot_get_fpga(struct bootm_headers *images) return fit_img_result; } + conf_noffset = fit_image_get_node(buf, uname); + compatible = fdt_getprop(buf, conf_noffset, "compatible", NULL); + if (!compatible) { + printf("'fpga' image without 'compatible' property\n"); + } else { + if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)) + flags = fpga_compatible2flag(devnum, compatible); + } + if (!fpga_is_partial_data(devnum, img_len)) { name = "full"; err = fpga_loadbitstream(devnum, (char *)img_data, img_len, BIT_FULL); if (err) err = fpga_load(devnum, (const void *)img_data, - img_len, BIT_FULL, 0); + img_len, BIT_FULL, flags); } else { name = "partial"; err = fpga_loadbitstream(devnum, (char *)img_data, img_len, BIT_PARTIAL); if (err) err = fpga_load(devnum, (const void *)img_data, - img_len, BIT_PARTIAL, 0); + img_len, BIT_PARTIAL, flags); } if (err) |