Merge tag 'u-boot-socfpga-next-20260213' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next

This pull request updates SoCFPGA platforms with DDR improvements, new
board support, Agilex5 enhancements and general cleanup across the
codebase.

DDR and memory handling

  * Add DRAM size checking support for Arria10.
  * Widen MEM_TOTAL_CAPACITY mask handling in IOSSM mailbox driver.
  * Assign unit address to memory node for improved memory
    representation and consistency.

Agilex / Agilex5 updates

  * Restore multi-DTB support for NAND boot and fix NAND clock handling.
  * Enable SD card UHS mode and eMMC HS200/HS400 mode support on Agilex5.
  * Fix DT property naming conventions for Agilex5.
  * Exclude AGILEX_L4_SYS_FREE_CLK from clock enable/disable operations
    to avoid unintended clock control.

New board support

  * Add support for CoreCourse Cyclone V boards:
     * AC501
     * AC550
Including device trees, QTS configuration, defconfigs and maintainers
entries.

Fixes and cleanup

  * Fix GEN5 handoff script path.
  * Remove incorrect CONFIG_SPL_LDSCRIPT settings.
  * Replace legacy TARGET namespace and perform related cleanup across
    SoCFPGA code.
  * General Kconfig, build and SoCFPGA maintenance updates.

Overall this pull request improves platform robustness, adds new board
coverage and cleans up legacy configuration usage across the SoCFPGA
U-Boot codebase.

[trini: Change TARGET_SOCFPGA_CYCLONE5 to ARCH_SOCFPGA_CYCLONE5 in the
new platforms this added]
Signed-off-by: Tom Rini <[email protected]>

9 files changed, 175 insertions, 5 deletions

diff --git a/configs/socfpga_ac501soc_defconfig b/configs/socfpga_ac501soc_defconfig
new file mode 100644
index 00000000000..3d584a6a8a9
--- /dev/null
+++ b/configs/socfpga_ac501soc_defconfig
@@ -0,0 +1,85 @@
+CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x4400
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_ac501soc"
+CONFIG_DM_RESET=y
+CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
+CONFIG_TARGET_SOCFPGA_CORECOURSE_AC501SOC=y
+CONFIG_SPL_FS_FAT=y
+# CONFIG_SPL_SPI is not set
+CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run fatscript;bridge enable; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_ac501soc.dtb"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CLOCKS=y
+CONFIG_SPL_PAD_TO=0x10000
+CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_HAVE_INIT_STACK=y
+# CONFIG_SPL_SYS_MMCSD_RAW_MODE is not set
+CONFIG_SYS_MAXARGS=32
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=256
+CONFIG_MMC_DW=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
+CONFIG_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="corecourse"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_SPL_WDT is not set
+CONFIG_SYS_TIMER_COUNTS_DOWN=y
+# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_CMD_C5_PL330_DMA=y
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/socfpga_ac550soc_defconfig b/configs/socfpga_ac550soc_defconfig
new file mode 100644
index 00000000000..143f5d0a043
--- /dev/null
+++ b/configs/socfpga_ac550soc_defconfig
@@ -0,0 +1,85 @@
+CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x4400
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_ac550soc"
+CONFIG_DM_RESET=y
+CONFIG_SPL_STACK=0x0
+CONFIG_SPL_TEXT_BASE=0xFFFF0000
+CONFIG_TARGET_SOCFPGA_CORECOURSE_AC550SOC=y
+CONFIG_SPL_FS_FAT=y
+# CONFIG_SPL_SPI is not set
+CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run fatscript;bridge enable; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_ac550soc.dtb"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CLOCKS=y
+CONFIG_SPL_PAD_TO=0x10000
+CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_HAVE_INIT_STACK=y
+# CONFIG_SPL_SYS_MMCSD_RAW_MODE is not set
+CONFIG_SYS_MAXARGS=32
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_DW=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=256
+CONFIG_MMC_DW=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MII=y
+CONFIG_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_DESIGNWARE_SPI=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="corecourse"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_SPL_WDT is not set
+CONFIG_SYS_TIMER_COUNTS_DOWN=y
+# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_CMD_C5_PL330_DMA=y
+CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index 5fbc49b2307..8a3f9563af2 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -87,6 +87,8 @@ CONFIG_DW_I3C_MASTER=y
 CONFIG_MISC=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ADMA=y
 CONFIG_SPL_MMC_SDHCI_ADMA=y
diff --git a/configs/socfpga_agilex5_emmc_defconfig b/configs/socfpga_agilex5_emmc_defconfig
index 9254ab92e0c..47d345be97c 100644
--- a/configs/socfpga_agilex5_emmc_defconfig
+++ b/configs/socfpga_agilex5_emmc_defconfig
@@ -4,3 +4,5 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk_emmc"
 # CONFIG_SPL_DM_REGULATOR_GPIO is not set
 # CONFIG_DM_REGULATOR_GPIO is not set
 # CONFIG_SPL_DWAPB_GPIO is not set
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
diff --git a/configs/socfpga_agilex7m_defconfig b/configs/socfpga_agilex7m_defconfig
index 0a8c58234b9..d3ecca436ef 100644
--- a/configs/socfpga_agilex7m_defconfig
+++ b/configs/socfpga_agilex7m_defconfig
@@ -1,7 +1,6 @@
 #include <configs/socfpga_agilex_defconfig>
 
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
 # CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK is not set
 # CONFIG_IDENT_STRING is not set
 CONFIG_SPL_BSS_START_ADDR=0x1ff00000
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index eb99392f0ea..b2c7b30d546 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -58,7 +58,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_SMC=y
 CONFIG_CMD_UBI=y
 CONFIG_OF_UPSTREAM=y
-CONFIG_OF_LIST=""
+CONFIG_OF_LIST="intel/socfpga_agilex_socdk intel/socfpga_agilex_socdk_nand"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_ENV_IS_IN_UBI=y
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig
index 1ef20ba97a8..bb8f1eb7264 100644
--- a/configs/socfpga_n5x_atf_defconfig
+++ b/configs/socfpga_n5x_atf_defconfig
@@ -4,7 +4,6 @@ CONFIG_ARCH_SOCFPGA=y
 CONFIG_TEXT_BASE=0x200000
 CONFIG_SYS_MALLOC_LEN=0x500000
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_MODE=0x2003
diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig
index a4798e2f953..78fe42e107c 100644
--- a/configs/socfpga_n5x_vab_defconfig
+++ b/configs/socfpga_n5x_vab_defconfig
@@ -4,7 +4,6 @@ CONFIG_ARCH_SOCFPGA=y
 CONFIG_TEXT_BASE=0x200000
 CONFIG_SYS_MALLOC_LEN=0x500000
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_MODE=0x2003
diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig
index 63ea467baef..206343885d9 100644
--- a/configs/socfpga_stratix10_atf_defconfig
+++ b/configs/socfpga_stratix10_atf_defconfig
@@ -4,7 +4,6 @@ CONFIG_ARCH_SOCFPGA=y
 CONFIG_TEXT_BASE=0x200000
 CONFIG_SYS_MALLOC_LEN=0x500000
 CONFIG_NR_DRAM_BANKS=2
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_MODE=0x2003