diff options
| author | Marek Vasut <[email protected]> | 2023-12-16 06:42:29 +0100 |
|---|---|---|
| committer | Fabio Estevam <[email protected]> | 2023-12-16 07:45:07 -0300 |
| commit | 31757f2bea18b7b4dc6eb6dc1838280a587dca79 (patch) | |
| tree | cbc599c7d57a42d89731bb2617e513d7555995cd /configs | |
| parent | d953ef8a2451aa74bc285b201439873735bd5045 (diff) | |
ARM: imx: Update DRAM timings with inline ECC on DH i.MX8MP DHCOM SoM
Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.
Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.
Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB and for 2 GiB device the available DRAM size
becomes 1.8 GiB.
Signed-off-by: Marek Vasut <[email protected]>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/imx8mp_dhcom_pdk2_defconfig | 3 | ||||
| -rw-r--r-- | configs/imx8mp_dhcom_pdk3_defconfig | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 09481343bc6..e072d7adca0 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -50,7 +50,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 @@ -161,6 +161,7 @@ CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MP=y CONFIG_CLK_IMX8MP=y CONFIG_FSL_CAAM=y +CONFIG_IMX8M_DRAM_INLINE_ECC=y CONFIG_DFU_TFTP=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index 86121c7d9a4..d0ace794bb2 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -51,7 +51,7 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_MAX_SIZE=0x25000 +CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 @@ -163,6 +163,7 @@ CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MP=y CONFIG_CLK_IMX8MP=y CONFIG_FSL_CAAM=y +CONFIG_IMX8M_DRAM_INLINE_ECC=y CONFIG_DFU_TFTP=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y |