diff options
| author | Kumar Gala <[email protected]> | 2009-09-22 15:45:44 -0500 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2009-09-24 12:05:27 -0500 |
| commit | 25bacf7a2b096496e2c58f2de4e5b2bce8fba038 (patch) | |
| tree | a698d12a783a168d9285b5b18599d3fa7e717e9e /cpu/mpc85xx/release.S | |
| parent | cb0ff65c619efacdc0ba69aa8ee6ede7dd364a38 (diff) | |
ppc/85xx: Fix enabling of L2 cache
We need to flash invalidate the locks in addition to the cache
before we enable.
Signed-off-by: Kumar Gala <[email protected]>
Diffstat (limited to 'cpu/mpc85xx/release.S')
| -rw-r--r-- | cpu/mpc85xx/release.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index 074b056b749..ecbd0d58577 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -102,7 +102,8 @@ __secondary_start_page: #ifdef CONFIG_BACKSIDE_L2_CACHE /* Enable/invalidate the L2 cache */ msync - lis r3,L2CSR0_L2FI@h + lis r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@h + ori r3,r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@l mtspr SPRN_L2CSR0,r3 1: mfspr r3,SPRN_L2CSR0 |