clk: mediatek: mt7629: fix gate offset of peri clock tree

The clock definitions in mt7629-clk.h indicate that CLK_PERIBUS_SEL is the
first element in the pericfg clock tree and also serves as a clock mux,
unlike other clocks belonging to the clock gate in pericfg.

This make the clock consumer get a wrong clock gate during request a clock
from <&pericfg>.

Since CLK_PERIBUS_SEL clock is not required in U-Boot, add a clock gate
offset for the pericfg clock tree to resolve this problem.

Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>

0 files changed, 0 insertions, 0 deletions