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authorTom Rini <[email protected]>2025-09-30 16:11:23 -0600
committerTom Rini <[email protected]>2025-09-30 16:11:23 -0600
commitaff68c8514858ddd8d2e508d47bede566511521b (patch)
tree8f00b82fd0c7bdb0a67d723b7fb1220870db4f3b /doc/develop/devicetree
parent667b9ef5b09b8157e705cca24ebed504da1dc1b2 (diff)
parentda57acb4c396cfc978c0652fec9dfb17a4f67ad8 (diff)
Merge tag 'u-boot-socfpga-next-20250930' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
SoCFPGA updates for v2025.10: CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762 This pull request brings a set of updates across SoCFPGA platforms covering Agilex5, Agilex7, N5X, and Stratix10. The changes include: * Agilex5 enhancements: - USB3.1 enablement and DWC3 host driver support - System Manager register configuration for USB3 - Watchdog timeout increase and SDMMC clock API integration - dcache handling improvements in SMC mailbox path - Enable SPL_SYS_DCACHE_OFF in defconfig * Clock driver improvements: - Introduce dt-bindings header for Agilex clocks - Add enable/disable API and EMAC clock selection fixes - Replace manual shifts with FIELD_GET usage * DDR updates: - IOSSM mailbox compatibility check - Correct DDR calibration status handling * Device tree changes: - Agilex5: disable cache allocation for reads - Stratix10: add NAND IP node - Enable driver model watchdog - Enable USB3.1 node for Agilex5 * Config cleanups: - Simplify Agilex7 VAB defconfig - Remove obsolete SYS_BOOTM_LEN from N5X VAB config - Enable CRC32 support for SoCFPGA - Increase USB hub debounce timeout Overall this set improves reliability of DDR and cache flows, adds missing USB and MMC features for Agilex5, and refines clock and configuration handling across platforms. This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
Diffstat (limited to 'doc/develop/devicetree')
-rw-r--r--doc/develop/devicetree/control.rst2
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst
index 0233945f8b6..8811e1d5c23 100644
--- a/doc/develop/devicetree/control.rst
+++ b/doc/develop/devicetree/control.rst
@@ -282,7 +282,7 @@ U-Boot can be divided into three phases: TPL, SPL and U-Boot proper.
The full devicetree is available to U-Boot proper, but normally only a subset
(or none at all) is available to TPL and SPL. See 'Pre-Relocation Support' and
-'SPL Support' in doc/driver-model/design.rst for more details.
+'SPL Support' in :doc:`/develop/driver-model/design` for more details.
Using several DTBs in the SPL (SPL_MULTI_DTB_FIT Kconfig option)