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| author | Santhosh Kumar K <[email protected]> | 2025-01-06 14:37:03 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-01-14 15:47:07 -0600 |
| commit | 39d66893ef23b4db43c6b12af9b65e7fadb3445c (patch) | |
| tree | b22fb5071d94fb80f762a840fc80ef5ec0c18cc1 /doc/develop/python_cq.rst | |
| parent | 22ce56a3ebdbd5fa5c8e727042f6b4af345112f2 (diff) | |
ram: k3-ddrss: Setup ECC region start and range
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions