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| author | Siddharth Vadapalli <[email protected]> | 2026-02-27 17:28:32 +0530 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-03-09 09:35:47 -0600 |
| commit | 430874ce20c78c4d2f427dac34860642f044c5fd (patch) | |
| tree | 96c92d77391bb58ec42b0463a947a7e63bf4b136 /doc/develop/python_cq.rst | |
| parent | 724952ac41c144a8528a273aeed23422b1e2330e (diff) | |
configs: am64x_evm_a53_defconfig: enable 64-bit addressing for PCIe
The PCIe0 instance of PCIe on the AM64x SoC uses the 4 GB Address Window
starting from 0x6_0000_0000 to map System Addresses to PCIe Bus Addresses.
Hence, enable CONFIG_SYS_PCI_64BIT.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions