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| author | Dylan Hung <[email protected]> | 2022-11-11 15:30:06 +0800 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-11-24 16:25:54 -0500 |
| commit | 581df347dbc3f5b528be8b36a62372c0aadde30a (patch) | |
| tree | 6b863adff5c739099b2b63d7eb66496148a7efa2 /doc/develop/python_cq.rst | |
| parent | c246d69f31f49d9ab7667ac2e42f0bdc3f212207 (diff) | |
ram: ast2600: Fix incorrect statement of the register polling
The condition "~data" in the if-statement is a typo. The original
intention is to poll if SDRAM_PHYCTRL0_INIT bit equals to 0. So use
"data == 0" for instead.
Besides, the bit[1] of "phy_status" register is hardwired to
SDRAM_PHYCTRL0_INIT (with inverse logic). Since SDRAM_PHYCTRL0_INIT has
already done, remove the unnecessary checking of phy_status[1].
Fixes: fde93143469f ("ram: aspeed: Add AST2600 DRAM control support")
Review-by: Ryan Chen <[email protected]>
Signed-off-by: Dylan Hung <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions
